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TosaToLinalg: Prefer to emit identity maps #386

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Merged
josel-amd merged 1 commit into from
Oct 18, 2024
Merged

TosaToLinalg: Prefer to emit identity maps #386

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10 changes: 8 additions & 2 deletions mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -925,8 +925,14 @@ emitElementwiseComputation(ConversionPatternRewriter &rewriter, Location loc,
auto shape = cast<ShapedType>(operand.getType()).getShape();
SmallVector<AffineExpr> affineExprs;
for (auto it : llvm::enumerate(shape)) {
auto affineExpr = it.value() == 1 ? rewriter.getAffineConstantExpr(0)
: rewriter.getAffineDimExpr(it.index());
// Prefer producting identity maps whenever possible (i.e. no broadcasting
// needed) because some transforms (like reshape folding)
// do not support affine constant exprs.
bool requiresBroadcast =
(it.value() == 1 && resultType.getDimSize(it.index()) != 1);
auto affineExpr = requiresBroadcast
? rewriter.getAffineConstantExpr(0)
: rewriter.getAffineDimExpr(it.index());
affineExprs.push_back(affineExpr);
}
return AffineMap::get(rank, 0, affineExprs, rewriter.getContext());
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20 changes: 20 additions & 0 deletions mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
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Expand Up @@ -250,6 +250,26 @@ func.func @test_add_1d_broadcast_static_to_static(%arg0: tensor<1xf32>, %arg1: t

// -----

// CHECK: #[[$MAP:.+]] = affine_map<(d0) -> (d0)>
// CHECK-LABEL: @test_add_1d_matching_no_broadcast
// CHECK-SAME: %[[ARG0:[0-9a-zA-Z_]*]]:
// CHECK-SAME: %[[ARG1:[0-9a-zA-Z_]*]]:
func.func @test_add_1d_matching_no_broadcast(%arg0: tensor<1xf32>, %arg1: tensor<1xf32>) -> tensor<1xf32> {

// CHECK: %[[VAL_0:.*]] = tensor.empty() : tensor<1xf32>
// CHECK: %[[RESULT:.*]] = linalg.generic {indexing_maps = [#[[$MAP]], #[[$MAP]], #[[$MAP]]], iterator_types = ["parallel"]} ins(%[[ARG0]], %[[ARG1]] : tensor<1xf32>, tensor<1xf32>) outs(%[[VAL_0]] : tensor<1xf32>) {
// CHECK: ^bb0(%[[VAL_1:.*]]: f32, %[[VAL_2:.*]]: f32, %[[VAL_3:.*]]: f32):
// CHECK: %[[VAL_4:.*]] = arith.addf %[[VAL_1]], %[[VAL_2]] : f32
// CHECK: linalg.yield %[[VAL_4]] : f32
// CHECK: } -> tensor<1xf32>
%0 = tosa.add %arg0, %arg1 : (tensor<1xf32>, tensor<1xf32>) -> tensor<1xf32>

// CHECK: return %[[RESULT]] : tensor<1xf32>
return %0 : tensor<1xf32>
}

// -----

// CHECK: #[[$MAP0:.+]] = affine_map<(d0) -> (d0)>
// CHECK-LABEL: @test_add_1d_matching_static
// CHECK-SAME: %[[ARG0:[0-9a-zA-Z_]*]]:
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