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feat: Implement ARM CPU feature detection across Linux, Android, BSD, Windows, macOS, and iOS#77

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Xor-el merged 1 commit intovNextfrom
enhnacement/add-arm-cpu-detection-logic
Apr 12, 2026
Merged

feat: Implement ARM CPU feature detection across Linux, Android, BSD, Windows, macOS, and iOS#77
Xor-el merged 1 commit intovNextfrom
enhnacement/add-arm-cpu-detection-logic

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@Xor-el Xor-el commented Apr 12, 2026

Description:

This PR replaces the stub // TODO implementations in TArmSimdFeatures with real, cross-platform ARM hardware capability detection. It mirrors the equivalent work done in HashLib4Pascal, adapted to CryptoLib4Pascal's naming conventions and project structure.

New Units

  • ClpArmHwCapProvider — Platform-abstracted ARM HWCAP provider:

    • Linux/Android: Resolves getauxval via dlsym to query AT_HWCAP/AT_HWCAP2
    • BSD (FreeBSD, NetBSD, DragonFlyBSD): Resolves elf_aux_info / _elf_aux_info via dlsym
    • Windows ARM64: Wraps IsProcessorFeaturePresent for PF_ARM_V8_* constants
    • Includes HWCAP bit definitions for both AArch64 and ARM32
  • ClpDarwinSysCtl — Darwin-specific (macOS/iOS) feature detection via sysctlbyname, resolved dynamically through dlsym. Supports modern FEAT_* sysctl keys (macOS 12+) with automatic fallback to legacy keys (macOS 11).

Changes to Existing Units

  • ClpArmSimdFeatures — All CPUHas* methods now contain real detection logic for NEON, AES, SHA1, SHA256, SHA512, SHA3, PMULL, SVE, and SVE2. Added CPUHasCRC32 / HasCRC32 for CRC32 instruction detection. Renamed FSimdLevelFActiveSimdLevel and GetSimdLevel()GetActiveSimdLevel().

  • ClpX86SimdFeatures — Renamed FSimdLevelFActiveSimdLevel and GetSimdLevel()GetActiveSimdLevel() for consistency with the ARM side.

  • ClpCpuFeaturesTCpuFeatures.X86 and TCpuFeatures.Arm properties (and their backing types/getters) are now conditionally compiled under CRYPTOLIB_X86 / CRYPTOLIB_ARM, so only the relevant architecture code is included per build target.

  • Include files (CryptoLib.inc, CryptoLibFPC.inc):

    • Renamed CRYPTOLIB_ARM (previously ARM32-specific) to CRYPTOLIB_ARM32 and CRYPTOLIB_ARM_ASM to CRYPTOLIB_ARM32_ASM to eliminate ambiguity
    • Introduced CRYPTOLIB_X86 (= I386 or X86_64) and CRYPTOLIB_ARM (= ARM32 or AArch64) as architecture-family defines
    • Moved feature detection defines (CRYPTOLIB_HAS_GETRANDOM, CRYPTOLIB_HAS_SECRANDOMCOPYBYTES, CRYPTOLIB_HAS_ARC4RANDOM_BUF, CRYPTOLIB_HAS_DEVRANDOM) out of the Delphi/FPC-specific blocks into a shared "Common Feature Detection" section, eliminating duplication between compilers
    • Added CRYPTOLIB_HAS_ARC4RANDOM_BUF for BSD and CRYPTOLIB_SOLARIS to the CRYPTOLIB_HAS_GETRANDOM group (Delphi side was previously missing these)
    • Reordered Delphi version feature defines to appear before CPU architecture defines
    • Normalized indentation throughout
    • Collapsed FPC frame-pointer optimization directives into single-line form

Design Notes

  • All platform API resolution uses dlopen(nil) + dlsym at runtime, avoiding hard static imports and gracefully degrading when symbols are unavailable.
  • ARM32 vs AArch64 differences in HWCAP register layout (e.g., ARM32 crypto extensions live in HWCAP2 while AArch64 uses HWCAP) are handled via conditional compilation.
  • On Windows ARM64, PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE bundles AES, PMULL, SHA1, and SHA256 together per Microsoft's documentation. SHA3/SHA512 use the newer PF_ARM_V82_* constants (defined locally to avoid SDK version dependency).

@Xor-el Xor-el merged commit d22d574 into vNext Apr 12, 2026
@Xor-el Xor-el deleted the enhnacement/add-arm-cpu-detection-logic branch April 12, 2026 21:59
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