On nrf, TWIM0 and SPIM0, and TWIM1 and SPIM1 share the same hardware (kind of like SERCOMs on atmel). Right now common-hal/busio/{I2C,SPI}.c only support a a single instance.
There is an SPIM2 peripheral that is not shared with TWI.
Allow multiple SPI and I2C instances to be created.
On nRF52840, there is a third peripheral, SPIM3, which can run at a higher clock speed (32 MHz). One consideration is how to specify this interface. The SPI constructor currently does not allow specifying the clock speed. We could shuffle the SPI peripherals under the covers if someone asks for 32 MHz, assuming they were quiescent. Or we could add a new parameter to the busio.SPI constructor to specify the frequency at instantiation. busio.I2C already allows this.
On nrf, TWIM0 and SPIM0, and TWIM1 and SPIM1 share the same hardware (kind of like SERCOMs on atmel). Right
now common-hal/busio/{I2C,SPI}.conly support a a single instance.There is an SPIM2 peripheral that is not shared with TWI.
Allow multiple SPI and I2C instances to be created.
On nRF52840, there is a third peripheral, SPIM3, which can run at a higher clock speed (32 MHz). One consideration is how to specify this interface. The SPI constructor currently does not allow specifying the clock speed. We could shuffle the SPI peripherals under the covers if someone asks for 32 MHz, assuming they were quiescent. Or we could add a new parameter to the
busio.SPIconstructor to specify the frequency at instantiation.busio.I2Calready allows this.