Skip to content
Closed
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
173 changes: 173 additions & 0 deletions ports/espressif/boards/waveshare_esp32_s3_lcd_1_28/board.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,173 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/

#include "supervisor/board.h"
#include "mpconfigboard.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-module/displayio/__init__.h"
#include "shared-module/displayio/mipi_constants.h"

#define DELAY 0x80

/* All init code scraped from Adafruit_GC9A01A driver */
#define GC9A01A_SWRESET 0x01 ///< Software Reset (maybe, not documented)
#define GC9A01A_INREGEN1 0xFE ///< Inter register enable 1
#define GC9A01A_INREGEN2 0xEF ///< Inter register enable 2
#define GC9A01A_MADCTL 0x36 ///< Memory Access Control
#define GC9A01A_COLMOD 0x3A ///< Pixel Format Set
#define GC9A01A1_POWER2 0xC3 ///< Power Control 2
#define GC9A01A1_POWER3 0xC4 ///< Power Control 3
#define GC9A01A1_POWER4 0xC9 ///< Power Control 4
#define GC9A01A_GAMMA1 0xF0 ///< Set gamma 1
#define GC9A01A_GAMMA2 0xF1 ///< Set gamma 2
#define GC9A01A_GAMMA3 0xF2 ///< Set gamma 3
#define GC9A01A_GAMMA4 0xF3 ///< Set gamma 4
#define GC9A01A_TEON 0x35 ///< Tearing Effect Line ON
#define GC9A01A_INVON 0x21 ///< Display Inversion ON
#define GC9A01A_SLPOUT 0x11 ///< Sleep Out
#define GC9A01A_DISPON 0x29 ///< Display ON
#define GC9A01A_FRAMERATE 0xE8 ///< Frame rate control

#define MADCTL_MX 0x40 ///< Right to left
#define MADCTL_BGR 0x08 ///< Blue-Green-Red pixel order

uint8_t display_init_sequence[] = {
GC9A01A_SWRESET, DELAY, 150,
GC9A01A_INREGEN2, 0,
0xEB, 1, 0x14,
GC9A01A_INREGEN1, 0,
GC9A01A_INREGEN2, 0,
0xEB, 1, 0x14,
0x84, 1, 0x40,
0x85, 1, 0xFF,
0x86, 1, 0xFF,
0x87, 1, 0xFF,
0x88, 1, 0x0A,
0x89, 1, 0x21,
0x8A, 1, 0x00,
0x8B, 1, 0x80,
0x8C, 1, 0x01,
0x8D, 1, 0x01,
0x8E, 1, 0xFF,
0x8F, 1, 0xFF,
0xB6, 2, 0x00, 0x00,
GC9A01A_MADCTL, 1, MADCTL_MX | MADCTL_BGR,
GC9A01A_COLMOD, 1, 0x05,
0x90, 4, 0x08, 0x08, 0x08, 0x08,
0xBD, 1, 0x06,
0xBC, 1, 0x00,
0xFF, 3, 0x60, 0x01, 0x04,
GC9A01A1_POWER2, 1, 0x13,
GC9A01A1_POWER3, 1, 0x13,
GC9A01A1_POWER4, 1, 0x22,
0xBE, 1, 0x11,
0xE1, 2, 0x10, 0x0E,
0xDF, 3, 0x21, 0x0c, 0x02,
GC9A01A_GAMMA1, 6, 0x45, 0x09, 0x08, 0x08, 0x26, 0x2A,
GC9A01A_GAMMA2, 6, 0x43, 0x70, 0x72, 0x36, 0x37, 0x6F,
GC9A01A_GAMMA3, 6, 0x45, 0x09, 0x08, 0x08, 0x26, 0x2A,
GC9A01A_GAMMA4, 6, 0x43, 0x70, 0x72, 0x36, 0x37, 0x6F,
0xED, 2, 0x1B, 0x0B,
0xAE, 1, 0x77,
0xCD, 1, 0x63,
// Unsure what this line (from manufacturer's boilerplate code) is
// meant to do, but users reported issues, seems to work OK without:
// 0x70, 9, 0x07, 0x07, 0x04, 0x0E, 0x0F, 0x09, 0x07, 0x08, 0x03, // ?
GC9A01A_FRAMERATE, 1, 0x34,
0x62, 12, 0x18, 0x0D, 0x71, 0xED, 0x70, 0x70, 0x18, 0x0F, 0x71, 0xEF, 0x70, 0x70,
0x63, 12, 0x18, 0x11, 0x71, 0xF1, 0x70, 0x70, 0x18, 0x13, 0x71, 0xF3, 0x70, 0x70,
0x64, 7, 0x28, 0x29, 0xF1, 0x01, 0xF1, 0x00, 0x07,
0x66, 10, 0x3C, 0x00, 0xCD, 0x67, 0x45, 0x45, 0x10, 0x00, 0x00, 0x00,
0x67, 10, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x54, 0x10, 0x32, 0x98,
0x74, 7, 0x10, 0x85, 0x80, 0x00, 0x00, 0x4E, 0x00,
0x98, 2, 0x3e, 0x07,
GC9A01A_TEON, 0,
GC9A01A_INVON, 0,
GC9A01A_SLPOUT, DELAY, 10, // Exit sleep
GC9A01A_DISPON, DELAY, 150, // Display on
};

static void display_init(void) {
fourwire_fourwire_obj_t *bus = &allocate_display_bus()->fourwire_bus;
busio_spi_obj_t *spi = &bus->inline_bus;
common_hal_busio_spi_construct(
spi,
&pin_GPIO10, // CLK
&pin_GPIO11, // MOSI
NULL, // MISO not connected
false // Not half-duplex
);
common_hal_busio_spi_never_reset(spi);
bus->base.type = &fourwire_fourwire_type;
common_hal_fourwire_fourwire_construct(
bus,
spi,
&pin_GPIO8, // DC
&pin_GPIO9, // CS
&pin_GPIO12, // RST
80000000, // baudrate
0, // polarity
0 // phase
);
busdisplay_busdisplay_obj_t *display = &allocate_display()->display;
display->base.type = &busdisplay_busdisplay_type;
common_hal_busdisplay_busdisplay_construct(
display,
bus,
240, // width (after rotation)
240, // height (after rotation)
0, // column start
0, // row start
0, // rotation
16, // color depth
false, // grayscale
false, // pixels in a byte share a row. Only valid for depths < 8
1, // bytes per cell. Only valid for depths < 8
false, // reverse_pixels_in_byte. Only valid for depths < 8
true, // reverse_pixels_in_word
MIPI_COMMAND_SET_COLUMN_ADDRESS, // set column command
MIPI_COMMAND_SET_PAGE_ADDRESS, // set row command
MIPI_COMMAND_WRITE_MEMORY_START, // write memory command
display_init_sequence,
sizeof(display_init_sequence),
&pin_GPIO40, // backlight pin
NO_BRIGHTNESS_COMMAND,
1.0f, // brightness
false, // single_byte_bounds
false, // data_as_commands
true, // auto_refresh
60, // native_frames_per_second
true, // backlight_on_high
false, // SH1107_addressing
5000 // backlight pwm frequency
);
}

void board_init(void) {
// Display
display_init();
}
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
43 changes: 43 additions & 0 deletions ports/espressif/boards/waveshare_esp32_s3_lcd_1_28/mpconfigboard.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,43 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/

// Micropython setup

#define MICROPY_HW_BOARD_NAME "Waveshare ESP32S3 LCD 1.28"
#define MICROPY_HW_MCU_NAME "ESP32S3"

#define DEFAULT_I2C_BUS_SDA (&pin_GPIO6)
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO7)

#define DEFAULT_SPI_BUS_SCK (&pin_GPIO10)
#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO11)
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO13)

#define DEFAULT_UART_BUS_RX (&pin_GPIO44)
#define DEFAULT_UART_BUS_TX (&pin_GPIO43)

#define CIRCUITPY_CONSOLE_UART_RX DEFAULT_UART_BUS_RX
#define CIRCUITPY_CONSOLE_UART_TX DEFAULT_UART_BUS_TX
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
CIRCUITPY_CREATOR_ID = 0x1BBB0000
CIRCUITPY_CREATION_ID = 0x00AB0001

# This board doesn't have USB by default, it
# instead uses a CH340C USB-to-Serial chip
CIRCUITPY_USB = 0
CIRCUITPY_ESP_USB_SERIAL_JTAG = 0

IDF_TARGET = esp32s3

# This flash lives outside the module.
CIRCUITPY_ESP_FLASH_MODE = qio
CIRCUITPY_ESP_FLASH_FREQ = 80m
CIRCUITPY_ESP_FLASH_SIZE = 16MB

CIRCUITPY_ESP_PSRAM_SIZE = 2MB
CIRCUITPY_ESP_PSRAM_MODE = qio
CIRCUITPY_ESP_PSRAM_FREQ = 80m

INTERNAL_FLASH_FILESYSTEM = 0
QSPI_FLASH_FILESYSTEM = 1
EXTERNAL_FLASH_DEVICES = W25Q128JVxQ

CIRCUITPY_ESPCAMERA = 0
68 changes: 68 additions & 0 deletions ports/espressif/boards/waveshare_esp32_s3_lcd_1_28/pins.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,68 @@
#include "shared-bindings/board/__init__.h"
#include "shared-module/displayio/__init__.h"

STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS

// User accessible GPIO
{ MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
{ MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
{ MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
{ MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
{ MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
{ MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
{ MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
{ MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
{ MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
{ MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
{ MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
{ MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
{ MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
{ MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
{ MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
{ MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
{ MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
{ MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
{ MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
{ MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
{ MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
{ MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },

// User button
{ MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_BUTTON0), MP_ROM_PTR(&pin_GPIO0) },

// Battery ADC
{ MP_ROM_QSTR(MP_QSTR_BAT_ADC), MP_ROM_PTR(&pin_GPIO1) },

// I2C
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO7) },
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO6) },

// SPI
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO10) },
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO11) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO13) },

// LCD
{ MP_ROM_QSTR(MP_QSTR_LCD_DC), MP_ROM_PTR(&pin_GPIO8) },
{ MP_ROM_QSTR(MP_QSTR_LCD_CS), MP_ROM_PTR(&pin_GPIO9) },
{ MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_GPIO12) },
{ MP_ROM_QSTR(MP_QSTR_LCD_BACKLIGHT), MP_ROM_PTR(&pin_GPIO40) },

// QMI8658C IMU
{ MP_ROM_QSTR(MP_QSTR_IMU_INT1), MP_ROM_PTR(&pin_GPIO47) },
{ MP_ROM_QSTR(MP_QSTR_IMU_INT2), MP_ROM_PTR(&pin_GPIO48) },

// UART
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },

// Objects
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
{ MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)},
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
15 changes: 15 additions & 0 deletions ports/espressif/boards/waveshare_esp32_s3_lcd_1_28/sdkconfig
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
#
# Espressif IoT Development Framework Configuration
#
#
# Component config
#
#
# LWIP
#
CONFIG_LWIP_LOCAL_HOSTNAME="waveshare-esp32-s3-lcd-1-28"
# end of LWIP

# end of Component config

# end of Espressif IoT Development Framework Configuration