Skip to content

MT6757/6.18#8

Closed
akku1139 wants to merge 115 commits into
stable/6.18.yfrom
mt6757/6.18
Closed

MT6757/6.18#8
akku1139 wants to merge 115 commits into
stable/6.18.yfrom
mt6757/6.18

Conversation

@akku1139

Copy link
Copy Markdown
Owner

No description provided.

bengris32 and others added 30 commits December 2, 2025 18:33
Add the compatible property for the timer on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible property for the systimer on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible property for sysirq on MT6757.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a device tree providing basic platform support for MT6757,
including secondary processor bringup (SMP), interrupt and timers.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible property for the Watchdog (WDT) on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device tree bindings for the Top Reset Generator Unit (TOPRGU)
on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add support for the Top Reset Generator Unit (TOPRGU) on the
MT6757 SoC, which is part of the Watchdog (WDT).

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the required device tree node to enable watchdog and TOPRGU
resets on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add clock and reset bindings for the apmixedsys, infracfg,
pericfg, and topckgen blocks on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add support for main clocks and resets on MT6757, including
apmixedsys, infracfg, pericfg and topckgen.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add clock and reset bindings for the camsys, imgsys, mfgcfg, vdecsys and
vencsys blocks on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add drivers to support clocks and resets provided by the camsys, imgsys, mfgcfg,
vdecsys and vencsys blocks on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the device tree nodes to support the basic clocks and resets
provided by topckgen, infracfg, pericfg and apmixedsys on the
MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible string for the UARTs on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the required device tree nodes to enable the two UARTs and their
associated APDMA controllers which are available on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible string for the PMIC Wrapper (PWRAP) on the MT6757 SoC.
This SoC's PMIC Wrapper has a near identical register layout to the one
on the MT6797 SoC, so re-use its platform data.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the required device tree node to enable the PMIC Wrapper (PWRAP)
hardware on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
The IRQ domain is currently created with a hardcoded number of interrupts (MT6397_IRQ_NR),
which only matches the number of interrupts for the MT6397 PMIC.

However, this driver also supports other PMICs like MT6323, MT6328, and MT6331,
which have different (and in some cases, significantly higher interrupt counts).

As a result, interrupts beyond MT6397's limit are not usable on those chips.

Instead, pass the actual number of interrupts supported by the PMIC chip to
irq_domain_create_linear() based on the chip ID.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Refactor mt6397-irq to support up to 7 different interrupt bases, which is found
on PMICs like the MT6355.

Introduce a new definition MT6397_INTERRUPT_BASES and a macro for_each_interrupt_base
to allow the number of interrupt registers to be easily increased in the future.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
This adds dt-binding documentation for Mediatek MT6351.
Only include mfd and regulator bindings.

[bengris32]: Convert documentation to YAML.

Signed-off-by: Jimmy-YJ.Huang <jimmy-yj.huang@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: bengris32 <bengris32@protonmail.ch>
The MT6351 is a regulator found on boards based on MediaTek MT6797,
MT6757 and probably other SoCs. It is a so called pmic and connects
as a slave to SoC using SPI, wrapped inside the pmic-wrapper.

[bengris32: Changes over original patch]
- Fixed build on newer kernel versions.
- Fixed swapped enable / voltage select registers.
- Fixed wrong voltage table for ldo_va18.
- Fixed incorrect voltage select bits.
- Remove ldo_vcn33_bt and ldo_vcn33_wifi regulators; replace with ldo_vcn33.
- Remove duplicated vldo28 regulator.

Signed-off-by: Jimmy-YJ.Huang <jimmy-yj.huang@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: bengris32 <bengris32@protonmail.ch>
[bengris32] Add interrupt support.

Signed-off-by: Jimmy-YJ.Huang <jimmy-yj.huang@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add PMIC keys support for the MT6351 PMIC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a device tree containing the required regulator nodes to support
regulators, rtc and keys on the MT6351 PMIC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device tree and pinfunc bindings for the pin controller on
the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a driver to support the pinmux/GPIO controller on the
MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the device tree node to enable the pin controller on the
MT6757 SoC and also include its device tree binding.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible string for the MMC controller on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add support for the MSDC on the MT6757 SoC.

This SoC's MSDC requires to clear SDC_FIFO_CFG_{RD,WR}VALIDSEL
bits in SDC_FIFO_CFG for writes, otherwise the requests will
time out, as done in the downstream driver.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the device nodes to enable the eMMC (mmc0), SD (mmc1) and
SDIO (mmc2) controllers present on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
bengris32 and others added 26 commits December 9, 2025 21:34
Add device node for the PWM backlight whcih is used on all Sony MT6757
devices.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
This commit adds support for Sony TD4322 Innolux
Full HD command mode DSI panel, as found in Sony
Xperia XA2 Ultra smartphones.

Due to the nature of phone manufacturing, it is impossible
to retrieve the actual panel name, hence the replacement
one, detailing the device it's used on.

[bengris32: This driver has been modified quite a bit for redwood...]
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Add required device nodes to bring up display on the Sony Xperia XA1 Ultra,
including required supplying regulators and GPIO pins.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Enable the Mali-T880 GPU on Sony Xperia XA1 devices.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
This panel is found on the Sony Xperia XA1 smartphone, add a driver for it.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add required device nodes to bring up display on the Sony Xperia XA1,
including required supplying regulators and GPIO pins.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add required device tree node and pin configuration for the Synaptics RMI4
TD4322 touch IC on the I2C0 bus.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Enable the regulator based haptics on the Sony Xperia XA1 devices.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
On Sony Xperia XA1 devices, the volume down button is connected to the MT6351
home button pin, so change the keycode of the home button key to KEY_VOLUMEDOWN.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
MT6351 PMIC power-off related registers are the same as the registers
on the MT6323 PMIC, so re-use it's power-off driver.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add power-off device node under the parent MT6351 MFD node.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Some ATF implementations (most likely on MediaTek devices) have broken
power-off and instead require PMIC register writes to properly power-off.

Similar situation applies for restart as well, the workaround is to instead
use WDT to reset, which is also what downstream does.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device node to register the reboot-poweroff handler and set the
arm,atf-broken-poweroff property to avoid invoking PSCI power-off
handler.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Document new properties to be used by the new auxadc calibration
functionality which will be added into the mt6577_auxadc driver.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a compatible string for the efuse region on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a device tree node for the efuse region on the MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add support for efuse calibration in the auxadc driver.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Signed-off-by: bengris32 <bengris32@protonmail.ch>
The auxadc thermal system on MT67XX and MT68XX SoCs seems to sit in between
versions V1 and V2. The efuse layout is mostly V1, but it has additional
entries for the likes of ADC_OE which is only seen otherwise in the V2 layout.
The downstream driver's version of raw_to_mcelsius uses a modified formula
of the V2 one, but there is a VTS value for each sensor, slightly adjusted
values and slope correction. Add support for this.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a compatible string for the auxadc based thermal controller on the
MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add support for the auxadc based thermal controller on the MT6757 SoC.

This SoC requires bits 19-16 of PTPCORESEL to be set at all times, so
introduce a new core_sel_bits member in mtk_thermal_data which will
be combined with the bank ID in mtk_thermal_get_bank.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a device node for the auxadc based thermal controller on the
MT6757 SoC.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Currently, auxadc_thermal only creates a single thermal zone for all
banks and reports the highest temperature reading from all of them.

This isn't ideal especially if we want to have different throttling
points for CPU / CCI / GPU.

Refactor the driver to create a thermal zone for each bank.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add thermal zones found on the MT6757 SoC. At the moment there is
no throttling points.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add basic support for the MT6355 PMIC, which is found on the Helio P25
SoC (a variant of the MT6757 platform).

Currently, only regulator and keys are supported.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
The MT6355 is a regulator found on boards based on MediaTek MT6757,
and probably other SoCs. It is a so called pmic and connects as a
slave to SoC using SPI, wrapped inside the pmic-wrapper.

This driver is based on the downstream version.

Signed-off-by: bengris32 <bengris32@protonmail.ch>
@akku1139 akku1139 changed the base branch from master to stable/6.18.y May 22, 2026 04:36
@akku1139 akku1139 closed this May 22, 2026
akku1139 added a commit that referenced this pull request May 23, 2026
stable: gregkh/linux@a921d01

LLVM's integrated assembler appears to assume an argument with default
value is passed whenever it sees a comma right after the macro name.
It will be fine if the number of following arguments is one less than
the number of parameters specified in the macro definition. Otherwise,
it fails. For example, the following code works:

$ cat foo.s
.macro  foo arg1=2, arg2=4
        ldr r0, [r1, #\arg1]
        ldr r0, [r1, #\arg2]
.endm

foo, arg2=8

$ llvm-mc -triple=armv7a -filetype=obj foo.s -o ias.o
arm-linux-gnueabihf-objdump -dr ias.o

ias.o:     file format elf32-littlearm

Disassembly of section .text:

00000000 <.text>:
   0: e5910001 ldr r0, [r1, #2]
   4: e591000 ldr r0, [r1, #8]

While the the following code would fail:

$ cat foo.s
.macro  foo arg1=2, arg2=4
        ldr r0, [r1, #\arg1]
        ldr r0, [r1, #\arg2]
.endm

foo, arg1=2, arg2=8

$ llvm-mc -triple=armv7a -filetype=obj foo.s -o ias.o
foo.s:6:14: error: too many positional arguments
foo, arg1=2, arg2=8

This causes build failures as follows:

arch/arm64/kernel/vdso/gettimeofday.S:230:24: error: too many positional
arguments
 clock_gettime_return, shift=1
                       ^
arch/arm64/kernel/vdso/gettimeofday.S:253:24: error: too many positional
arguments
 clock_gettime_return, shift=1
                       ^
arch/arm64/kernel/vdso/gettimeofday.S:274:24: error: too many positional
arguments
 clock_gettime_return, shift=1

This error is not in mainline because commit 28b1a82 ("arm64: vdso:
Substitute gettimeofday() with C implementation") rewrote this assembler
file in C as part of a 25 patch series that is unsuitable for stable.
Just remove the comma in the clock_gettime_return invocations in 4.19 so
that GNU as and LLVM's integrated assembler work the same.

Link:
ClangBuiltLinux#1349

Suggested-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Jian Cai <jiancai@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Akari Tsuyukusa <akkun11.open@gmail.com>
akku1139 added a commit that referenced this pull request May 23, 2026
LLVM's integrated assembler appears to assume an argument with default
value is passed whenever it sees a comma right after the macro name.
It will be fine if the number of following arguments is one less than
the number of parameters specified in the macro definition. Otherwise,
it fails. For example, the following code works:

$ cat foo.s
.macro  foo arg1=2, arg2=4
        ldr r0, [r1, #\arg1]
        ldr r0, [r1, #\arg2]
.endm

foo, arg2=8

$ llvm-mc -triple=armv7a -filetype=obj foo.s -o ias.o
arm-linux-gnueabihf-objdump -dr ias.o

ias.o:     file format elf32-littlearm

Disassembly of section .text:

00000000 <.text>:
   0: e5910001 ldr r0, [r1, #2]
   4: e591000 ldr r0, [r1, #8]

While the the following code would fail:

$ cat foo.s
.macro  foo arg1=2, arg2=4
        ldr r0, [r1, #\arg1]
        ldr r0, [r1, #\arg2]
.endm

foo, arg1=2, arg2=8

$ llvm-mc -triple=armv7a -filetype=obj foo.s -o ias.o
foo.s:6:14: error: too many positional arguments
foo, arg1=2, arg2=8

This causes build failures as follows:

arch/arm64/kernel/vdso/gettimeofday.S:230:24: error: too many positional
arguments
 clock_gettime_return, shift=1
                       ^
arch/arm64/kernel/vdso/gettimeofday.S:253:24: error: too many positional
arguments
 clock_gettime_return, shift=1
                       ^
arch/arm64/kernel/vdso/gettimeofday.S:274:24: error: too many positional
arguments
 clock_gettime_return, shift=1

This error is not in mainline because commit 28b1a82 ("arm64: vdso:
Substitute gettimeofday() with C implementation") rewrote this assembler
file in C as part of a 25 patch series that is unsuitable for stable.
Just remove the comma in the clock_gettime_return invocations in 4.19 so
that GNU as and LLVM's integrated assembler work the same.

Link:
ClangBuiltLinux#1349

Suggested-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Jian Cai <jiancai@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: gregkh/linux@a921d01
Signed-off-by: Akari Tsuyukusa <akkun11.open@gmail.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

4 participants