MT6757/6.17#9
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Add the compatible property for the timer on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible property for the systimer on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible property for sysirq on MT6757. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a device tree providing basic platform support for MT6757, including secondary processor bringup (SMP), interrupt and timers. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible property for the Watchdog (WDT) on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device tree bindings for the Top Reset Generator Unit (TOPRGU) on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add support for the Top Reset Generator Unit (TOPRGU) on the MT6757 SoC, which is part of the Watchdog (WDT). Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the required device tree node to enable watchdog and TOPRGU resets on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add clock and reset bindings for the apmixedsys, infracfg, pericfg, and topckgen blocks on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add support for main clocks and resets on MT6757, including apmixedsys, infracfg, pericfg and topckgen. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add clock and reset bindings for the camsys, imgsys, mfgcfg, vdecsys and vencsys blocks on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add drivers to support clocks and resets provided by the camsys, imgsys, mfgcfg, vdecsys and vencsys blocks on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the device tree nodes to support the basic clocks and resets provided by topckgen, infracfg, pericfg and apmixedsys on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible string for the UARTs on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the required device tree nodes to enable the two UARTs and their associated APDMA controllers which are available on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible string for the PMIC Wrapper (PWRAP) on the MT6757 SoC. This SoC's PMIC Wrapper has a near identical register layout to the one on the MT6797 SoC, so re-use its platform data. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the required device tree node to enable the PMIC Wrapper (PWRAP) hardware on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
The IRQ domain is currently created with a hardcoded number of interrupts (MT6397_IRQ_NR), which only matches the number of interrupts for the MT6397 PMIC. However, this driver also supports other PMICs like MT6323, MT6328, and MT6331, which have different (and in some cases, significantly higher interrupt counts). As a result, interrupts beyond MT6397's limit are not usable on those chips. Instead, pass the actual number of interrupts supported by the PMIC chip to irq_domain_create_linear() based on the chip ID. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Refactor mt6397-irq to support up to 6 different interrupt bases, which is found on PMICs like the MT6355. Introduce a new definition MT6397_INTERRUPT_BASES and a macro for_each_interrupt_base to allow the number of interrupt registers to be easily increased in the future. Signed-off-by: bengris32 <bengris32@protonmail.ch>
This adds dt-binding documentation for Mediatek MT6351. Only include mfd and regulator bindings. [bengris32]: Convert documentation to YAML. Signed-off-by: Jimmy-YJ.Huang <jimmy-yj.huang@mediatek.com> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: bengris32 <bengris32@protonmail.ch>
The MT6351 is a regulator found on boards based on MediaTek MT6797, MT6757 and probably other SoCs. It is a so called pmic and connects as a slave to SoC using SPI, wrapped inside the pmic-wrapper. [bengris32: Changes over original patch] - Fixed build on newer kernel versions. - Fixed swapped enable / voltage select registers. - Fixed wrong voltage table for ldo_va18. - Fixed incorrect voltage select bits. - Remove ldo_vcn33_bt and ldo_vcn33_wifi regulators; replace with ldo_vcn33. Signed-off-by: Jimmy-YJ.Huang <jimmy-yj.huang@mediatek.com> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: bengris32 <bengris32@protonmail.ch>
[bengris32] Add interrupt support. Signed-off-by: Jimmy-YJ.Huang <jimmy-yj.huang@mediatek.com> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add PMIC keys support for the MT6351 PMIC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a device tree containing the required regulator nodes to support regulators, rtc and keys on the MT6351 PMIC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device tree and pinfunc bindings for the pin controller on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a driver to support the pinmux/GPIO controller on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the device tree node to enable the pin controller on the MT6757 SoC and also include its device tree binding. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the compatible string for the MMC controller on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add support for the MSDC on the MT6757 SoC.
This SoC's MSDC requires to clear SDC_FIFO_CFG_{RD,WR}VALIDSEL
bits in SDC_FIFO_CFG for writes, otherwise the requests will
time out, as done in the downstream driver.
Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the device nodes to enable the eMMC (mmc0), SD (mmc1) and SDIO (mmc2) controllers present on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
…6757 Add a compatible string for the Display CCORR on the MT6757 SoC, reusing the MT8183 compatible data. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a compatible string for the Display AAL on the MT6757 SoC, reusing the MT8183 compatible data. Signed-off-by: bengris32 <bengris32@protonmail.ch>
…6757 Add a compatible string for the Display GAMMA on the MT6757 SoC, reusing the MT8183 compatible data. Signed-off-by: bengris32 <bengris32@protonmail.ch>
…T6757 Add a compatible string for the Display DITHER on the MT6757 SoC, reusing the MT8183 compatible data. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a compatible string for the Display UFOE on the MT6757 SoC, reusing the MT8173 compatible data. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a compatible string for the Display PWM on the MT6757 SoC, reusing the MT8173 compatible data. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device nodes for the primary display blocks in the MT6757 SoC, including the DSI PHY and DSI interface. Signed-off-by: bengris32 <bengris32@protonmail.ch>
This is needed when the bootloader leaves it in the wrong state. Signed-off-by: Dinolek <git@dinolek.me>
Signed-off-by: bengris32 <bengris32@protonmail.ch>
Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a compatible string for the Mali-T880 GPU on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device tree nodes for the MFGCFG clock / reset controller and the Mali-T880 GPU present on the MT6757 SoC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add compatible strings for the MT6757 Helio P20 and Xperia XA1 family of devices. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add basic device trees for the Sony Xperia XA1 family of smartphones, including the XA1, XA1 Plus and XA1 Ultra. Create a common dtsi that will be shared amongst all three devices since they all share a lot of hardware similarities. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Include the device tree for the MT6351 PMIC and provide the required interrupt to enable PMIC. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the required device tree nodes to enable the BQ25896 charger, which lives on the I2C1 bus. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add a device node for the TUSB320 USB-C logic controller under I2C1 and enable both MTU3 and the USB T-PHY. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device tree nodes for the GPIO keys on the Sony Xperia XA1 series, this includes the camera and volume down button. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add the device nodes to enable the internal eMMC storage on the Sony Xperia XA1 series. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add device node for the PWM backlight whcih is used on all Sony MT6757 devices. Signed-off-by: bengris32 <bengris32@protonmail.ch>
This commit adds support for Sony TD4322 Innolux Full HD command mode DSI panel, as found in Sony Xperia XA2 Ultra smartphones. Due to the nature of phone manufacturing, it is impossible to retrieve the actual panel name, hence the replacement one, detailing the device it's used on. [bengris32: This driver has been modified quite a bit for redwood...] Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Add required device nodes to bring up display on the Sony Xperia XA1 Ultra, including required supplying regulators and GPIO pins. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Enable the Mali-T880 GPU on Sony Xperia XA1 devices. Signed-off-by: bengris32 <bengris32@protonmail.ch>
This panel is found on the Sony Xperia XA1 smartphone, add a driver for it. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add required device nodes to bring up display on the Sony Xperia XA1, including required supplying regulators and GPIO pins. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Add required device tree node and pin configuration for the Synaptics RMI4 TD4322 touch IC on the I2C0 bus. Signed-off-by: bengris32 <bengris32@protonmail.ch>
Enable the regulator based haptics on the Sony Xperia XA1 devices. Signed-off-by: bengris32 <bengris32@protonmail.ch>
On Sony Xperia XA1 devices, the volume down button is connected to the MT6351 home button pin, so change the keycode of the home button key to KEY_VOLUMEDOWN. Signed-off-by: bengris32 <bengris32@protonmail.ch>
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