This repo contains the report submitted for the final project in my Intro to VLSI class, Fall 2016. The project was to design a 64-bit SRAM including peripheral circuitry such as row decoding and input/output registers. We were only required to lay out the SRAM array, not the peripheral circuitry.

In my undergraduate VLSI classes, I had a project to design a larger SRAM which included column decoding as well. For that project we did layout for the peripheral circuitry. Unfortunately, I no longer have the report or other materials from that class.