arch/kinetis: Fix S32K3XX regressions caused by refactoring

arch/arm/src/kinetis/hardware/kinetis_flexcan.h

@@ -151,9 +151,9 @@
 
 /* Control 1 Register */
 
-#define CAN_CTRL1_PROSEG_SHIFT     (0)       /* Bits 0-2: Propagation Segment */
-#define CAN_CTRL1_PROSEG_MASK      (7 << CAN_CTRL1_PROSEG_SHIFT)
-#define CAN_CTRL1_PROPSEG(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PROPSEG_SHIFT)) & CAN_CTRL1_PROSEG_MASK)
+#define CAN_CTRL1_PROPSEG_SHIFT    (0)       /* Bits 0-2: Propagation Segment */
+#define CAN_CTRL1_PROPSEG_MASK     (7 << CAN_CTRL1_PROPSEG_SHIFT)
+#define CAN_CTRL1_PROPSEG(x)       (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PROPSEG_SHIFT)) & CAN_CTRL1_PROPSEG_MASK)
 #define CAN_CTRL1_LOM              (1 << 3)  /* Bit 3:  Listen-Only Mode */
 #define CAN_CTRL1_LBUF             (1 << 4)  /* Bit 4:  Lowest Buffer Transmitted First */
 #define CAN_CTRL1_TSYN             (1 << 5)  /* Bit 5:  Timer Sync */
@@ -166,7 +166,7 @@
 #define CAN_CTRL1_CLKSRC           (1 << 13) /* Bit 13: CAN Engine Clock Source */
 #define CAN_CTRL1_ERRMSK           (1 << 14) /* Bit 14: Error Mask */
 #define CAN_CTRL1_BOFFMSK          (1 << 15) /* Bit 15: Bus Off Mask */
-#define CAN_CTRL1_TIMINGMSK        ((0xFFFF << 16) |  CAN_CTRL1_PROSEG_MASK)
+#define CAN_CTRL1_TIMINGMSK        ((0xFFFF << 16) |  CAN_CTRL1_PROPSEG_MASK)
                                              /* Bitmask for propseg, pseg1/2, rjw & presdiv */
                                              /* Bits 16-31: Timing Mask */
 #define CAN_CTRL1_PSEG2_SHIFT      (16)      /* Bits 16-18: Phase Segment 2 */

arch/arm/src/kinetis/kinetis_edma.c

@@ -144,6 +144,7 @@ struct kinetis_edma_s
   /* This array describes each DMA channel */
 
   struct kinetis_dmach_s dmach[KINETIS_EDMA_NCHANNELS];
+  spinlock_t lock;
 };
 
 /****************************************************************************
@@ -223,8 +224,6 @@ static struct kinetis_edmatcd_s *kinetis_tcd_alloc(void)
 #if CONFIG_KINETIS_EDMA_NTCD > 0
 static void kinetis_tcd_free_nolock(struct kinetis_edmatcd_s *tcd)
 {
-  irqstate_t flags;
-
   /* Add the the TCD to the end of the free list and post the 'dsem',
    * possibly waking up another thread that might be waiting for
    * a TCD.

arch/arm/src/s32k3xx/s32k3xx_edma.c

@@ -156,6 +156,7 @@ struct s32k3xx_edma_s
   /* This array describes each DMA channel */
 
   struct s32k3xx_dmach_s dmach[S32K3XX_EDMA_NCHANNELS];
+  spinlock_t lock;
 };
 
 /****************************************************************************

arch/arm/src/s32k3xx/s32k3xx_emac.c

@@ -36,6 +36,7 @@
 #include <errno.h>
 
 #include <sys/param.h>
+#include <arch/barriers.h>
 
 #include <arpa/inet.h>