!arch/risc-v/espressif: Update common-source integration for RISC-V devices#18492
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xiaoxiang781216 merged 1 commit intoapache:masterfrom Mar 5, 2026
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Hi @tmedicci , I think you forgot to update all the defconfig for this board esp32-c3-zero For example |
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fdcavalcanti
previously approved these changes
Mar 4, 2026
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Thanks, @simbit18 . I started this job long ago and, yes, probably more defconfigs were added. I review them all (thanks again). |
…vices This commit updates the common-source integration for RISC-V-based Espressif devices (ESP32-C3, ESP32-C6, and ESP32-H2). This is part of a larger common-source update split by architecture for better maintainability of the already-supported devices and upcoming devices. Major components updated: - IRQ allocator refactoring with intr_alloc integration - Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.) - Espressif components upgrade to release/master.b - Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.) - Wireless adapters (Wi-Fi and BLE) - Board defconfigs for all RISC-V Espressif boards - Critical section handling improvements Key architectural changes: - IRQ Allocator: The new interrupt allocator enables multiple mapping options from interrupt sources to CPU interrupts, providing flexibility required by modern peripherals. Although this introduces breaking changes to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE Kconfig option is explicitly checked during startup to ensure proper configuration. This validation prevents runtime issues from configuration mismatches. Note: This is a large commit to maintain bisectability. Breaking the changes into smaller commits would result in non-building intermediate states across the common-source infrastructure update. Tested configurations: - All defconfigs were built and tested, inclusing `ostest`. Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com> To be merged with RISC-V implementation
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simbit18
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Mar 4, 2026
fdcavalcanti
approved these changes
Mar 4, 2026
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Summary
This PR updates the common-source integration for RISC-V-based Espressif devices (ESP32-C3, ESP32-C6, and ESP32-H2). This is part of a
larger common-source update split by architecture for better maintainability of the already-supported devices and upcoming devices.
Major components updated:
Key architectural changes:
required by modern peripherals. Although this introduces breaking changes to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper configuration. This validation prevents runtime issues from configuration
mismatches.
Note: This is a large commit to maintain bisectability. Breaking the changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Note to the Reviewers:
Although it's a huge PR, reviewing it is not that difficult. Some key points can be summarized here:
nuttx/arch/risc-v/src/common/espressif/) are mostly related to either path changes and the new IRQ allocator.defconfigswere updated to be compatible with the new IRQ allocator. Although it is a breaking change from user's perspective, the required Kconfig-selectable options are checked atarch/risc-v/src/common/espressif/esp_irq.cImpact
Impact on user: Yes, they need to update their defconfig to select the following Kconfig:
Please note that these options are checked with pre-processor macros, so it can't be "left behind".
Impact on build: Yes. Build will fail if the newer Kconfig aren't selected.
Impact on hardware: Yes. This change is mandatory to support newer Espressif devices on NuttX.
Impact on documentation: No.
Impact on security: No.
Impact on compatibility: Yes, this is a breaking change with minor effects. The missing Kconfig options are checked with pre-processor macros and guides the user to select the required configs.
Testing
All Espressif's defconfigs were tested with hardware in the loop. In addition to peripherals' testing,
ostestis checked tooBuilding
Cleaning Existing Builds
Select either ESP32-C3, ESP32-C6 or ESP32-H2
ESP32-C3
ESP32-C6
ESP32-H2
Building and Flashing
Running
Results