arch/arm/stm32*: Cleanup stm32 irq reporting#18606
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Rename STM32_IRQ_NEXTINT to STM32_IRQ_NEXTINTS across all stm32 variants. In stm32_dumpnvic() dynamically print NVIC enable and priority registers based on STM32_IRQ_NEXTINTS. Use PRIx32 format specifier instead of 'x' (since uint32_t on arm is actually a long unsigned int). Simplify if/else chain in stm32_irqinfo() to determine irq reg/bit. There's no stm32_irqinfo.c; remove mention in stm32f0l0g0/Make.defs. Signed-off-by Peter Barada <peter.barada@gmail.com>
linguini1
approved these changes
Mar 25, 2026
xiaoxiang781216
approved these changes
Mar 26, 2026
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Cleanup stm32_irq.c
Summary
Impact
User experience: No adaptation required.
Build: No impact.
Hardware: Should not affect ARM-based boards.
Documentation: No impact.
Security: No impact.
Compatibility: No impact.
Testing
Build Host:
Target:
Note, for each configuration, following tweaks performed after configuration/before build to enable stm32_dumpnvic() and ram syslog to see its output on each board:
nucloeo-h743zi2:
nucleo-h767zi:
nucleo-f446re:
Using modified tools/testbuild.sh compile-tested across all stm32:nsh configurations