Skip to content

arch/risc-v/cmake: fix linker option case in Toolchain.cmake.#18768

Merged
simbit18 merged 1 commit intoapache:masterfrom
yanxingyu17:fix/risc-v-cmake-linker-option-typo
Apr 20, 2026
Merged

arch/risc-v/cmake: fix linker option case in Toolchain.cmake.#18768
simbit18 merged 1 commit intoapache:masterfrom
yanxingyu17:fix/risc-v-cmake-linker-option-typo

Conversation

@yanxingyu17
Copy link
Copy Markdown
Contributor

Summary

Fix lowercase -wl to correct -Wl in arch/risc-v/src/cmake/Toolchain.cmake.

GCC requires uppercase -Wl as the linker option pass-through prefix.
The lowercase -wl,--print-memory-usage is silently ignored, causing
no memory usage report printed during LTO full linking.

Impact

Impact on user: No
Impact on build: Yes, memory usage report now correctly printed for RISC-V LTO full builds.
Impact on hardware: No
Impact on documentation: No
Impact on security: No
Impact on compatibility: No

Testing

Build Host: Ubuntu 22.04, x86_64, GCC 13.2
Target: risc-v, qemu-rv:nsh

Testing logs before change:

(no memory usage output during linking)

Testing logs after change:

Memory region         Used Size  Region Size  %age Used
flash:                  xxx KB       xxx KB     xx.xx%
sram:                   xxx KB       xxx KB     xx.xx%

PR verification Self-Check

  • This PR introduces only one functional change.
  • I have updated all required description fields above.
  • My PR adheres to Contributing Guidelines and Documentation.
  • My PR is still work in progress (not ready for review).
  • My PR is ready for review and can be safely merged into a codebase.

Fix lowercase -wl to correct -Wl for GCC linker pass-through
option in LTO full configuration. The lowercase form is not
recognized by the linker, causing --print-memory-usage to be
silently ignored.

Signed-off-by: v-yanxingyu <v-yanxingyu@xiaomi.com>
@yanxingyu17 yanxingyu17 requested review from anchao and yf13 as code owners April 20, 2026 13:20
@github-actions github-actions bot added Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Size: XS The size of the change in this PR is very small labels Apr 20, 2026
Copy link
Copy Markdown
Contributor

@fdcavalcanti fdcavalcanti left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Thank you @yanxingyu17!

@simbit18 simbit18 merged commit 02407ad into apache:master Apr 20, 2026
18 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Size: XS The size of the change in this PR is very small

Projects

None yet

Development

Successfully merging this pull request may close these issues.

4 participants