rtc/ptc85263A: Add handling of stop_enable flag.#18988
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xiaoxiang781216 merged 1 commit intoMay 28, 2026
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On some boards, the PCF85263 RTC does not count between reboots. Due to STOP_ENABLE (register 0x2E), bit=0 = 1, which freezes the RTC counter. The exact trigger is unknown - not all boards exhibit the issue. The bit is battery-backed and persists across reboots, so once set (e.g. by a power glitch or undefined hardware state) the RTC stays frozen until explicitly cleared. The old driver never did this. Fix: write `0x00` to `STOP_ENABLE` on init, which is the correct reset value per the datasheet. Fix: set time properly: Due to datasheet the set_time should be as follow: 1. set stop_enable 2. clear prescaler 3. set time 4. clear stop_enable Signed-off-by: Marin Doetterer <marin@auterion.com>
xiaoxiang781216
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May 28, 2026
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acassis
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Summary
On some boards, the PCF85263 RTC does not count between reboots. After inspecting the registers
at boot,
STOP_ENABLE(register0x2E) had bit 0 set (STOP=1), which freezes the RTC counter.The exact trigger is unknown - not all boards exhibit the issue. The bit is battery-backed and
persists across reboots, so once set (e.g. by a power glitch or undefined hardware state) the
RTC stays frozen until explicitly cleared. The old driver never did this.
Fix: write
0x00toSTOP_ENABLEon init, which is the correct reset value per the datasheet.Fix: set time properly:
Due to datasheet the set_time should be as follow:
1. set stop_enable
2. clear prescaler
3. set time
4. clear stop_enable
Impact
On affected boards, system time resets to the last value written via
system_time setafterevery reboot, regardless of how much time has passed:
Testing
Tested on PixHawk v6x (STM32H753IIK6)
Boot logs before and after the fix:
Before Fix
After Fix
Automated Power Cycle Test
41 iterations: power on → set time → power off → power on → compare RTC vs PC time.
STOPwas0on every boot after the fix. The remaining ~1s diff is a measurement artifactfrom integer truncation in the test script, not an RTC error.