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Revisions

  • Trim AI acknowledgment to the essential statement

    @apoage apoage committed Jul 20, 2026
  • Rebalance AI acknowledgment: list Claude's own mistakes alongside Kimi's Previous version singled out Kimi's byte-offset error while implying Claude hadn't made any. That wasn't accurate -- Claude made at least three real mistakes during this project's own development, all real, all caught before shipping. Listed honestly rather than one-sided.

    @apoage apoage committed Jul 20, 2026
  • Add AI co-authorship note (Claude, and Kimi for the v1.0.1-prompting review)

    @apoage apoage committed Jul 20, 2026
  • Add full technical wiki: every timing parameter explained in depth 12 pages covering primary timings (CL/tRCD/tRP/tRAS/tRC), refresh (tRFC), bank-group/activation timings (tFAW/tRRD/tCCD), write/turnaround timings (tWR/tWTR/tRTP), inferred values (tCWL/command rate), voltage, SPD byte structure and timebase encoding, module organization and the capacity formula, module-type/ECC compatibility, XMP profiles, the worst-case computation methodology (including the real tRC bug this project found and fixed), and a design-decisions FAQ.

    @apoage apoage committed Jul 20, 2026
  • Initial Home page

    @apoage apoage committed Jul 20, 2026