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meson: Fix broken patches (#4795)
1 parent 50a1ecd commit c6b9135

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2 files changed

+18
-181
lines changed

2 files changed

+18
-181
lines changed

patch/kernel/archive/meson-5.15/m8-m8b-m8m2-Support-HDMI.patch

Lines changed: 10 additions & 146 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,6 @@ Special thank.
1414
arch/arm/boot/dts/meson8m2.dtsi | 4 +
1515
drivers/clk/meson/meson8b.c | 163 +-
1616
drivers/clk/meson/meson8b.h | 26 +-
17-
drivers/gpu/drm/bridge/display-connector.c | 86 +
1817
drivers/gpu/drm/meson/Kconfig | 8 +
1918
drivers/gpu/drm/meson/Makefile | 3 +-
2019
drivers/gpu/drm/meson/meson_drv.c | 290 ++-
@@ -28,13 +27,13 @@ Special thank.
2827
drivers/gpu/drm/meson/meson_vclk.c | 146 ++
2928
drivers/gpu/drm/meson/meson_venc.c | 45 +-
3029
drivers/gpu/drm/meson/meson_venc_cvbs.c | 293 ---
31-
drivers/gpu/drm/meson/meson_viu.c | 38 +-
30+
drivers/gpu/drm/meson/meson_viu.c | 18 +-
3231
drivers/phy/amlogic/Kconfig | 20 +
3332
drivers/phy/amlogic/Makefile | 2 +
3433
drivers/phy/amlogic/phy-meson-cvbs-dac.c | 310 ++++
3534
drivers/phy/amlogic/phy-meson8-hdmi-tx.c | 160 ++
3635
include/dt-bindings/clock/meson8b-clkc.h | 10 +
37-
29 files changed, 4203 insertions(+), 476 deletions(-)
36+
28 files changed, 4101 insertions(+), 472 deletions(-)
3837
create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-cvbs-dac-phy.yaml
3938
create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml
4039
create mode 100644 drivers/gpu/drm/meson/meson_encoder_cvbs.c
@@ -751,7 +750,7 @@ index 6725dd9fd825..fcb2ad976098 100644
751750
compatible = "amlogic,meson8m2-wdt", "amlogic,meson8b-wdt";
752751
};
753752
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
754-
index a844d35b553a..cd0f5bae24d4 100644
753+
index 809a0bfb670d..12e9b6618dbb 100644
755754
--- a/drivers/clk/meson/meson8b.c
756755
+++ b/drivers/clk/meson/meson8b.c
757756
@@ -118,6 +118,56 @@ static struct clk_regmap meson8b_fixed_pll = {
@@ -1308,114 +1307,6 @@ index b1a5074cf148..ce62ed47cbfc 100644
13081307

13091308
/*
13101309
* include the CLKID and RESETID that have
1311-
diff --git a/drivers/gpu/drm/bridge/display-connector.c b/drivers/gpu/drm/bridge/display-connector.c
1312-
index 847a0dce7f1d..d24f5b90feab 100644
1313-
--- a/drivers/gpu/drm/bridge/display-connector.c
1314-
+++ b/drivers/gpu/drm/bridge/display-connector.c
1315-
@@ -13,6 +13,7 @@
1316-
#include <linux/platform_device.h>
1317-
#include <linux/regulator/consumer.h>
1318-
1319-
+#include <drm/drm_atomic_helper.h>
1320-
#include <drm/drm_bridge.h>
1321-
#include <drm/drm_edid.h>
1322-
1323-
@@ -87,10 +88,95 @@ static struct edid *display_connector_get_edid(struct drm_bridge *bridge,
1324-
return drm_get_edid(connector, conn->bridge.ddc);
1325-
}
1326-
1327-
+/*
1328-
+ * Since this bridge is tied to the connector, it acts like a passthrough,
1329-
+ * so concerning the output bus formats, either pass the bus formats from the
1330-
+ * previous bridge or return fallback data like done in the bridge function:
1331-
+ * drm_atomic_bridge_chain_select_bus_fmts().
1332-
+ * This supports negotiation if the bridge chain has all bits in place.
1333-
+ */
1334-
+static u32 *display_connector_get_output_bus_fmts(struct drm_bridge *bridge,
1335-
+ struct drm_bridge_state *bridge_state,
1336-
+ struct drm_crtc_state *crtc_state,
1337-
+ struct drm_connector_state *conn_state,
1338-
+ unsigned int *num_output_fmts)
1339-
+{
1340-
+ struct drm_bridge *prev_bridge = drm_bridge_get_prev_bridge(bridge);
1341-
+ struct drm_bridge_state *prev_bridge_state;
1342-
+
1343-
+ if (!prev_bridge || !prev_bridge->funcs->atomic_get_output_bus_fmts) {
1344-
+ struct drm_connector *conn = conn_state->connector;
1345-
+ u32 *out_bus_fmts;
1346-
+
1347-
+ *num_output_fmts = 1;
1348-
+ out_bus_fmts = kmalloc(sizeof(*out_bus_fmts), GFP_KERNEL);
1349-
+ if (!out_bus_fmts)
1350-
+ return NULL;
1351-
+
1352-
+ if (conn->display_info.num_bus_formats &&
1353-
+ conn->display_info.bus_formats)
1354-
+ out_bus_fmts[0] = conn->display_info.bus_formats[0];
1355-
+ else
1356-
+ out_bus_fmts[0] = MEDIA_BUS_FMT_FIXED;
1357-
+
1358-
+ return out_bus_fmts;
1359-
+ }
1360-
+
1361-
+ prev_bridge_state = drm_atomic_get_new_bridge_state(crtc_state->state,
1362-
+ prev_bridge);
1363-
+
1364-
+ return prev_bridge->funcs->atomic_get_output_bus_fmts(prev_bridge, prev_bridge_state,
1365-
+ crtc_state, conn_state,
1366-
+ num_output_fmts);
1367-
+}
1368-
+
1369-
+/*
1370-
+ * Since this bridge is tied to the connector, it acts like a passthrough,
1371-
+ * so concerning the input bus formats, either pass the bus formats from the
1372-
+ * previous bridge or MEDIA_BUS_FMT_FIXED (like select_bus_fmt_recursive())
1373-
+ * when atomic_get_input_bus_fmts is not supported.
1374-
+ * This supports negotiation if the bridge chain has all bits in place.
1375-
+ */
1376-
+static u32 *display_connector_get_input_bus_fmts(struct drm_bridge *bridge,
1377-
+ struct drm_bridge_state *bridge_state,
1378-
+ struct drm_crtc_state *crtc_state,
1379-
+ struct drm_connector_state *conn_state,
1380-
+ u32 output_fmt,
1381-
+ unsigned int *num_input_fmts)
1382-
+{
1383-
+ struct drm_bridge *prev_bridge = drm_bridge_get_prev_bridge(bridge);
1384-
+ struct drm_bridge_state *prev_bridge_state;
1385-
+
1386-
+ if (!prev_bridge || !prev_bridge->funcs->atomic_get_input_bus_fmts) {
1387-
+ u32 *in_bus_fmts;
1388-
+
1389-
+ *num_input_fmts = 1;
1390-
+ in_bus_fmts = kmalloc(sizeof(*in_bus_fmts), GFP_KERNEL);
1391-
+ if (!in_bus_fmts)
1392-
+ return NULL;
1393-
+
1394-
+ in_bus_fmts[0] = MEDIA_BUS_FMT_FIXED;
1395-
+
1396-
+ return in_bus_fmts;
1397-
+ }
1398-
+
1399-
+ prev_bridge_state = drm_atomic_get_new_bridge_state(crtc_state->state,
1400-
+ prev_bridge);
1401-
+
1402-
+ return prev_bridge->funcs->atomic_get_input_bus_fmts(prev_bridge, prev_bridge_state,
1403-
+ crtc_state, conn_state, output_fmt,
1404-
+ num_input_fmts);
1405-
+}
1406-
+
1407-
static const struct drm_bridge_funcs display_connector_bridge_funcs = {
1408-
.attach = display_connector_attach,
1409-
.detect = display_connector_detect,
1410-
.get_edid = display_connector_get_edid,
1411-
+ .atomic_get_output_bus_fmts = display_connector_get_output_bus_fmts,
1412-
+ .atomic_get_input_bus_fmts = display_connector_get_input_bus_fmts,
1413-
+ .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
1414-
+ .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
1415-
+ .atomic_reset = drm_atomic_helper_bridge_reset,
1416-
};
1417-
1418-
static irqreturn_t display_connector_hpd_irq(int irq, void *arg)
14191310
diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig
14201311
index a4e1ed96e5e8..2023bc2b4dec 100644
14211312
--- a/drivers/gpu/drm/meson/Kconfig
@@ -1448,7 +1339,7 @@ index 523fce45f16b..817a5270aee6 100644
14481339
obj-$(CONFIG_DRM_MESON_DW_HDMI) += meson_dw_hdmi.o
14491340
+obj-$(CONFIG_DRM_MESON_TRANSWITCH_HDMI) += meson_transwitch_hdmi.o
14501341
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
1451-
index a56607501d36..0df139d8df8f 100644
1342+
index 6e37de4fcb46..71d4cdc57d58 100644
14521343
--- a/drivers/gpu/drm/meson/meson_drv.c
14531344
+++ b/drivers/gpu/drm/meson/meson_drv.c
14541345
@@ -12,6 +12,7 @@
@@ -1827,9 +1718,9 @@ index a56607501d36..0df139d8df8f 100644
18271718
}
18281719

18291720
if (count && !match)
1830-
@@ -520,6 +634,18 @@ static int meson_drv_probe(struct platform_device *pdev)
1721+
@@ -527,6 +641,18 @@ static int meson_drv_remove(struct platform_device *pdev)
18311722
return 0;
1832-
};
1723+
}
18331724

18341725
+static struct meson_drm_match_data meson_drm_m8_data = {
18351726
+ .compat = VPU_COMPATIBLE_M8,
@@ -1846,7 +1737,7 @@ index a56607501d36..0df139d8df8f 100644
18461737
static struct meson_drm_match_data meson_drm_gxbb_data = {
18471738
.compat = VPU_COMPATIBLE_GXBB,
18481739
};
1849-
@@ -539,6 +665,12 @@ static struct meson_drm_match_data meson_drm_g12a_data = {
1740+
@@ -546,6 +672,12 @@ static struct meson_drm_match_data meson_drm_g12a_data = {
18501741
};
18511742

18521743
static const struct of_device_id dt_match[] = {
@@ -2342,7 +2233,7 @@ index a7692584487c..62c5cde59224 100644
23422233
pdev = of_find_device_by_node(remote);
23432234
of_node_put(remote);
23442235
diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
2345-
index 8640a8a8a469..456e2f421713 100644
2236+
index 44aa52629443..c835e6d35568 100644
23462237
--- a/drivers/gpu/drm/meson/meson_plane.c
23472238
+++ b/drivers/gpu/drm/meson/meson_plane.c
23482239
@@ -199,8 +199,11 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
@@ -5091,37 +4982,10 @@ index f1747fde1fe0..000000000000
50914982
- return 0;
50924983
-}
50934984
diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c
5094-
index bb7e109534de..406498ba2f79 100644
4985+
index cd399b0b7181..bdfa342c4ca1 100644
50954986
--- a/drivers/gpu/drm/meson/meson_viu.c
50964987
+++ b/drivers/gpu/drm/meson/meson_viu.c
5097-
@@ -436,10 +436,22 @@ void meson_viu_init(struct meson_drm *priv)
5098-
5099-
/* Initialize OSD1 fifo control register */
5100-
reg = VIU_OSD_DDR_PRIORITY_URGENT |
5101-
- VIU_OSD_HOLD_FIFO_LINES(31) |
5102-
- VIU_OSD_FIFO_DEPTH_VAL(32) | /* fifo_depth_val: 32*8=256 */
5103-
- VIU_OSD_WORDS_PER_BURST(4) | /* 4 words in 1 burst */
5104-
- VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */
5105-
+ VIU_OSD_FIFO_DEPTH_VAL(32) | /* fifo_depth_val: 32*8=256 */
5106-
+ VIU_OSD_WORDS_PER_BURST(4) | /* 4 words in 1 burst */
5107-
+ VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */
5108-
+
5109-
+ /*
5110-
+ * When using AFBC on newer SoCs the AFBC encoder has to be reset. To
5111-
+ * leave time for that we need hold more lines to avoid glitches.
5112-
+ * On the 32-bit SoCs however we need to hold fewer lines because
5113-
+ * otherwise screen tearing can occur (for example in kmscube).
5114-
+ */
5115-
+ if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8) ||
5116-
+ meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8B) ||
5117-
+ meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8M2))
5118-
+ reg |= VIU_OSD_HOLD_FIFO_LINES(12);
5119-
+ else
5120-
+ reg |= VIU_OSD_HOLD_FIFO_LINES(31);
5121-
5122-
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
5123-
reg |= VIU_OSD_BURST_LENGTH_32;
5124-
@@ -449,13 +461,17 @@ void meson_viu_init(struct meson_drm *priv)
4988+
@@ -448,13 +448,17 @@ void meson_viu_init(struct meson_drm *priv)
51254989
writel_relaxed(reg, priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT));
51264990
writel_relaxed(reg, priv->io_base + _REG(VIU_OSD2_FIFO_CTRL_STAT));
51274991

patch/kernel/archive/meson-6.1/0001-m8-m8b-m8m2-Support-HDMI.patch

Lines changed: 8 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -22,11 +22,11 @@ Special thank to Martin Blumenstingl.
2222
drivers/gpu/drm/meson/meson_transwitch_hdmi.h | 536 ++++++
2323
drivers/gpu/drm/meson/meson_vclk.c | 146 ++
2424
drivers/gpu/drm/meson/meson_venc.c | 44 +-
25-
drivers/gpu/drm/meson/meson_viu.c | 38 +-
25+
drivers/gpu/drm/meson/meson_viu.c | 18 +-
2626
drivers/phy/amlogic/Kconfig | 10 +
2727
drivers/phy/amlogic/Makefile | 1 +
2828
drivers/phy/amlogic/phy-meson-cvbs-dac.c | 375 ++++
29-
21 files changed, 3593 insertions(+), 130 deletions(-)
29+
21 files changed, 3577 insertions(+), 126 deletions(-)
3030
create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-cvbs-dac-phy.yaml
3131
create mode 100644 drivers/gpu/drm/meson/meson_transwitch_hdmi.c
3232
create mode 100644 drivers/gpu/drm/meson/meson_transwitch_hdmi.h
@@ -1265,7 +1265,7 @@ index c62ee358456..fe0a8f8762f 100644
12651265
struct {
12661266
bool osd1_enabled;
12671267
diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
1268-
index 5675bc2a92c..3e40bd45c90 100644
1268+
index 3f73b211fa8..833f701fe27 100644
12691269
--- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c
12701270
+++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c
12711271
@@ -11,6 +11,7 @@
@@ -1318,15 +1318,15 @@ index 5675bc2a92c..3e40bd45c90 100644
13181318
static int meson_encoder_cvbs_get_modes(struct drm_bridge *bridge,
13191319
struct drm_connector *connector)
13201320
{
1321-
@@ -147,6 +159,7 @@ static void meson_encoder_cvbs_atomic_enable(struct drm_bridge *bridge,
1321+
@@ -148,6 +160,7 @@ static void meson_encoder_cvbs_atomic_enable(struct drm_bridge *bridge,
13221322
struct drm_connector_state *conn_state;
13231323
struct drm_crtc_state *crtc_state;
13241324
struct drm_connector *connector;
13251325
+ int ret;
13261326

13271327
connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
13281328
if (WARN_ON(!connector))
1329-
@@ -176,16 +189,13 @@ static void meson_encoder_cvbs_atomic_enable(struct drm_bridge *bridge,
1329+
@@ -177,16 +190,13 @@ static void meson_encoder_cvbs_atomic_enable(struct drm_bridge *bridge,
13301330
writel_bits_relaxed(VENC_VDAC_SEL_ATV_DMD, 0,
13311331
priv->io_base + _REG(VENC_VDAC_DACSEL0));
13321332

@@ -1350,7 +1350,7 @@ index 5675bc2a92c..3e40bd45c90 100644
13501350
}
13511351
}
13521352

1353-
@@ -195,19 +205,22 @@ static void meson_encoder_cvbs_atomic_disable(struct drm_bridge *bridge,
1353+
@@ -196,19 +206,22 @@ static void meson_encoder_cvbs_atomic_disable(struct drm_bridge *bridge,
13541354
struct meson_encoder_cvbs *meson_encoder_cvbs =
13551355
bridge_to_meson_encoder_cvbs(bridge);
13561356
struct meson_drm *priv = meson_encoder_cvbs->priv;
@@ -3959,37 +3959,10 @@ index 3c55ed00335..009882bda7b 100644
39593959
/* Disable HDMI */
39603960
writel_bits_relaxed(VPU_HDMI_ENCI_DATA_TO_HDMI |
39613961
diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c
3962-
index d4b907889a2..836dac22c8e 100644
3962+
index cd399b0b718..bdfa342c4ca 100644
39633963
--- a/drivers/gpu/drm/meson/meson_viu.c
39643964
+++ b/drivers/gpu/drm/meson/meson_viu.c
3965-
@@ -436,10 +436,22 @@ void meson_viu_init(struct meson_drm *priv)
3966-
3967-
/* Initialize OSD1 fifo control register */
3968-
reg = VIU_OSD_DDR_PRIORITY_URGENT |
3969-
- VIU_OSD_HOLD_FIFO_LINES(31) |
3970-
- VIU_OSD_FIFO_DEPTH_VAL(32) | /* fifo_depth_val: 32*8=256 */
3971-
- VIU_OSD_WORDS_PER_BURST(4) | /* 4 words in 1 burst */
3972-
- VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */
3973-
+ VIU_OSD_FIFO_DEPTH_VAL(32) | /* fifo_depth_val: 32*8=256 */
3974-
+ VIU_OSD_WORDS_PER_BURST(4) | /* 4 words in 1 burst */
3975-
+ VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */
3976-
+
3977-
+ /*
3978-
+ * When using AFBC on newer SoCs the AFBC encoder has to be reset. To
3979-
+ * leave time for that we need hold more lines to avoid glitches.
3980-
+ * On the 32-bit SoCs however we need to hold fewer lines because
3981-
+ * otherwise screen tearing can occur (for example in kmscube).
3982-
+ */
3983-
+ if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8) ||
3984-
+ meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8B) ||
3985-
+ meson_vpu_is_compatible(priv, VPU_COMPATIBLE_M8M2))
3986-
+ reg |= VIU_OSD_HOLD_FIFO_LINES(12);
3987-
+ else
3988-
+ reg |= VIU_OSD_HOLD_FIFO_LINES(31);
3989-
3990-
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
3991-
reg |= VIU_OSD_BURST_LENGTH_32;
3992-
@@ -449,13 +461,17 @@ void meson_viu_init(struct meson_drm *priv)
3965+
@@ -448,13 +448,17 @@ void meson_viu_init(struct meson_drm *priv)
39933966
writel_relaxed(reg, priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT));
39943967
writel_relaxed(reg, priv->io_base + _REG(VIU_OSD2_FIFO_CTRL_STAT));
39953968

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