[pull] master from torvalds:master#1589
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pull[bot] merged 396 commits intoawootorg:masterfrom Mar 31, 2022
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Include generic pwm.yaml schema, which enforces PWM node naming and brings pwm-cells requirement. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm-cells property is already required by pwm.yaml schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm-cells property is already required by pwm.yaml schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm-cells property is already required by pwm.yaml schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm-cells property is already required by pwm.yaml schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm-cells property is already required by pwm.yaml schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm-cells property is already required by pwm.yaml schema. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
- Remove the superfluous cast; the multiplication will yield a 64-bit
result due to the "100ULL" anyway,
- "a * (1 << b)" == "a << b".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use floor ops on SDCC1 APPS clock in order to round down selected clock frequency and avoid overclocking SD/eMMC cards. For example, currently HS200 cards were failling tuning as they were actually being clocked at 384MHz instead of 192MHz. This caused some boards to disable 1.8V I/O and force the eMMC into the standard HS mode (50MHz) and that appeared to work despite the eMMC being overclocked to 96Mhz in that case. There was a previous commit to use floor ops on SDCC clocks, but it looks to have only covered SDCC2 clock. Fixes: 9607f62 ("clk: qcom: ipq8074: add PCIE, USB and SDCC clocks") Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de> Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220210173100.505128-1-robimarko@gmail.com
The Qualcomm SC8280XP has a RPMh clock controller, so add a compatible for this to the binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220223044516.3776637-1-bjorn.andersson@linaro.org
The Qualcomm SC8280XP platform exposes 5 clocks through the RPMh clock controller. Add these, and the relates active-only variants, to the RPMh clock controller driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20220223044516.3776637-2-bjorn.andersson@linaro.org
GCC warns: > ../drivers/clk/nxp/clk-lpc18xx-cgu.c: In function ‘lpc18xx_pll1_recalc_rate’: > ../drivers/clk/nxp/clk-lpc18xx-cgu.c:460:13: warning: variable ‘stat’ set but not used [-Wunused-but-set-variable] > 460 | u32 stat, ctrl; > | ^~~~ Get rid of the (apparently) useless read from the PLL1_STAT register and the declaration of stat. Reported-by: kernel test robot <lkp@intel.com> Fixes: b04e0b8 ("clk: add lpc18xx cgu clk driver") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220205103613.1216218-2-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
lpc18xx_fill_parent_names's "id" parameter isn't used for writing, so let's make it const. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220205103613.1216218-3-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The elements of the table are never modified in clk-mux.c. To make this clear to clock drivers, declare the parameter as const u32 *table. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220205103613.1216218-4-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Now that clk_register_mux_table takes a const u32 *, we don't need the cast anymore. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220205103613.1216218-5-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Now that clk_register_mux_table takes a const u32 *, we can declare the mux tables as const u32[]. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220205103613.1216218-6-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Now that clk_register_mux_table takes a const u32 *, we can declare the mux tables as const u32[]. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220205103613.1216218-7-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Now that clk_register_mux_table takes a const u32 *, we can declare the mux table as const u32[]. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220205103613.1216218-8-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This list array doesn't change at runtime. Mark it const to move to RO memory. Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20220217220554.2711696-2-sboyd@kernel.org
Clarify that the 'target' clk isn't being modified, instead it's being searched for. Mark it const so the function can't modify it. Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20220217220554.2711696-3-sboyd@kernel.org
I2C board info is only required during adapter setup so there is no requirement to keeping a pointer to it once running. To support dynamic device addition we can't rely on board info - user-space creation through sysfs won't have a boardinfo. Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Jamie Iles <quic_jiles@quicinc.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220117174816.1963463-2-quic_jiles@quicinc.com
I2C devices can be added to the system dynamically through several sources other than static board info including device tree overlays and sysfs i2c new_device. Add an I2C bus notifier to attach the clients at runtime if they were not defined in the board info. For DT devices find the LVR in the reg property, for user-space new_device additions we synthesize a conservative setting of no spike filters and fast mode only. Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Jamie Iles <quic_jiles@quicinc.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220117174816.1963463-3-quic_jiles@quicinc.com
The audio_mclk_root_clk was added as a gate with the CCGR121 (0x4790), but according to the reference manual, there is no such gate. The CCGR121 belongs to ECSPI2 and it is not shared. Fixes: 8f6d809 ("ARM: imx: add imx7d clk tree support") Reported-by: David Wolfe <david.wolfe@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220127141052.1900174-2-abel.vesa@nxp.com
Add imx8dxl scu clock support. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20220222082140.2073629-1-abel.vesa@nxp.com
The > needs to be >= to prevent an off by one access. Fixes: d5f1e6a ("clk: imx: imx8qxp-lpcg: add parsing clocks from device tree") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/20220228075014.GD13685@kili Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Add the clock dt-binding file for i.MX93. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-2-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Add i.MX93 clock definition Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-3-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
i.MX93 CCM ROOT clock has a mux, gate and divider in one register, here is to combine all these into one composite clk and simplify clk tree. i.MX93 CCM is a new IP compared with i.MX8M, so introduce a new file. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-4-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
This PLL module is a Fractional-N synthesizer, supporting 30-bit numerator and denominator. Numerator is a signed number. It has feature to adjust fractional portion of feedback divider dynamically. This fracn gppll is used in i.MX93. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-5-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Add i.MX93 clk driver. i.MX93 clk hardware design is different compared with i.MX8M. It supports 4 sources for each clk root and the sources are separated into a few groups, low speed/fast io/audio and etc. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-6-peng.fan@oss.nxp.com [abel.vesa@nxp.com: Added missing module license and description] Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Add the missing logic to allow Lasi, WAX and Dino to set the CPU affinity. This fixes IRQ migration to other CPUs when a CPU is shutdown which currently holds the IRQs for one of those chips. Signed-off-by: Helge Deller <deller@gmx.de>
The cpu_set_affinity_irq() isn't needed. Not the CPU irqs need to change, but the slave irq chips simply need to be reprogrammed to a new CPU irq with the txn_* functions. Signed-off-by: Helge Deller <deller@gmx.de>
Allow the system to find the SUSE hppa compiler and linker to set CROSS32_COMPILE and CROSS_COMPILE. Suggested-by: Jiri Slaby <jirislaby@kernel.org> Signed-off-by: Helge Deller <deller@gmx.de>
Clean up the code for the mfctl() and mtctl() functions and add often used constants. Signed-off-by: Helge Deller <deller@gmx.de>
Call set_firmware_width() only once at runtime. This prevents that hotplugged CPUs will get stuck in spinlocks later on. Signed-off-by: Helge Deller <deller@gmx.de>
Switch away from the own cpu topology code to common code which is used by ARM64 and RISCV. That will allow us to enable CPU hotplug later on. Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Helge Deller <deller@gmx.de>
If CONFIG_HOTPLUG_CPU is enabled, those functions will be run again after bootup. So they need to reside in the .text section. Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Helge Deller <deller@gmx.de>
Add pdc_cpu_rendezvous_lock() and pdc_cpu_rendezvous_unlock() to lock PDC while CPU is transitioning into rendezvous state. This is needed, because the transition phase may take up to 8 seconds. Add pdc_pat_get_PDC_entrypoint() to get PDC entry point for current CPU. Signed-off-by: Helge Deller <deller@gmx.de>
Add relevant code to __cpu_die() and __cpu_disable() to finally enable the CPU hotplugging features. Reset the irq count values in smp_callin() to zero before bringing up the CPU. It seems that the firmware may need up to 8 seconds to fully stop a CPU in which no other PDC calls are allowed to be made. Use a timeout __cpu_die() to accommodate for this. Use "chcpu -d 1" to bring CPU1 down, and "chcpu -e 1" to bring it up. Signed-off-by: Helge Deller <deller@gmx.de>
Let the PDC firmware put the CPU into firmware idle loop with the pdc_cpu_rendezvous() function. Signed-off-by: Helge Deller <deller@gmx.de>
Move the common_stext function into the non-init text section if hotplug is enabled. This function is called from the firmware when hotplugged CPUs are brought up. Signed-off-by: Helge Deller <deller@gmx.de>
When CPU hotplugging is enabled, the user may want to remove the current CPU which is providing the timer ticks. If this happens we need to find a new timesync master. Signed-off-by: Helge Deller <deller@gmx.de>
This change fixes the following: 1) The flags variable is not initialized. Always use raw_spin_lock_irqsave and raw_spin_unlock_irqrestore to serialize patching. 2) flush_kernel_vmap_range is primarily intended for DMA flushes. Since __patch_text_multiple is often called with interrupts disabled, it is better to directly call flush_kernel_dcache_range_asm and flush_kernel_icache_range_asm. This avoids an extra call. 3) The final call to flush_icache_range is unnecessary. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
The "test_dev" pointer is freed but then returned to the caller. Fixes: d9c6a72 ("kmod: add test driver to stress test the module loader") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
…kernel/git/nvdimm/nvdimm
Pull libnvdimm updates from Dan Williams:
"The update for this cycle includes the deprecation of block-aperture
mode and a new perf events interface for the papr_scm nvdimm driver.
The perf events approach was acked by PeterZ.
- Add perf support for nvdimm events, initially only for 'papr_scm'
devices.
- Deprecate the 'block aperture' support in libnvdimm, it only ever
existed in the specification, not in shipping product"
* tag 'libnvdimm-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm:
nvdimm/blk: Fix title level
MAINTAINERS: remove section LIBNVDIMM BLK: MMIO-APERTURE DRIVER
powerpc/papr_scm: Fix build failure when
drivers/nvdimm: Fix build failure when CONFIG_PERF_EVENTS is not set
nvdimm/region: Delete nd_blk_region infrastructure
ACPI: NFIT: Remove block aperture support
nvdimm/namespace: Delete nd_namespace_blk
nvdimm/namespace: Delete blk namespace consideration in shared paths
nvdimm/blk: Delete the block-aperture window driver
nvdimm/region: Fix default alignment for small regions
docs: ABI: sysfs-bus-nvdimm: Document sysfs event format entries for nvdimm pmu
powerpc/papr_scm: Add perf interface support
drivers/nvdimm: Add perf interface to expose nvdimm performance stats
drivers/nvdimm: Add nvdimm pmu structure
…l/git/clk/linux
Pull clk updates from Stephen Boyd:
"There's one large change in the core clk framework here. We change how
clk_set_rate_range() works so that the frequency is re-evaulated each
time the rate is changed. Previously we wouldn't let clk providers see
a rate that was different if it was still within the range, which
could be bad for power if the clk could run slower when a range
expands. Now the clk provider can decide to do something differently
when the constraints change. This broke Nvidia's clk driver so we had
to wait for the fix for that to bake a little more in -next.
The rate range patch series also introduced a kunit suite for the clk
framework that we're going to extend in the next release. It already
made it easy to find corner cases in the rate range patches so I'm
excited to see it cover more clk code and increase our confidence in
core framework patches in the future. I also added a kunit test for
the basic clk gate code and that work will continue to cover more
basic clk types: muxes, dividers, etc.
Beyond the core code we have the usual set of clk driver updates and
additions. Qualcomm again dominates the diffstat here with lots more
SoCs being supported and i.MX follows afer that with a similar number
of SoCs gaining clk drivers. Beyond those large additions there's
drivers being modernized to use clk_parent_data so we can move away
from global string names for all the clks in an SoC. Finally there's
lots of little fixes all over the clk drivers for typos, warnings, and
missing clks that aren't critical and get batched up waiting for the
next merge window to open. Nothing super big stands out in the driver
pile. Full details are below.
Core:
- Make clk_set_rate_range() re-evaluate the limits each time
- Introduce various clk_set_rate_range() tests
- Add clk_drop_range() to drop a previously set range
New Drivers:
- i.MXRT1050 clock driver and bindings
- i.MX8DXL clock driver and bindings
- i.MX93 clock driver and bindings
- NCO blocks on Apple SoCs
- Audio clks on StarFive JH7100 RISC-V SoC
- Add support for the new Renesas RZ/V2L SoC
- Qualcomm SDX65 A7 PLL
- Qualcomm SM6350 GPU clks
- Qualcomm SM6125, SM6350, QCS2290 display clks
- Qualcomm MSM8226 multimedia clks
Updates:
- Kunit tests for clk-gate implementation
- Terminate arrays with sentinels and make that clearer
- Cleanup SPDX tags
- Fix typos in comments
- Mark mux table as const in clk-mux
- Make the all_lists array const
- Convert Cirrus Logic CS2000P driver to regmap, yamlify DT binding
and add support for dynamic mode
- Clock configuration on Microchip PolarFire SoCs
- Free allocations on probe error in Mediatek clk driver
- Modernize Mediatek clk driver by consolidating code
- Add watchdog (WDT), I2C, and pin function controller (PFC) clocks
on Renesas R-Car S4-8
- Improve the clocks for the Rockchip rk3568 display outputs
(parenting, pll-rates)
- Use of_device_get_match_data() instead of open-coding on Rockchip
rk3568
- Reintroduce the expected fractional-divider behaviour that
disappeared with the addition of CLK_FRAC_DIVIDER_POWER_OF_TWO_PS
- Remove SYS PLL 1/2 clock gates for i.MX8M*
- Remove AUDIO MCLK ROOT from i.MX7D
- Add fracn gppll clock type used by i.MX93
- Add new composite clock for i.MX93
- Add missing media mipi phy ref clock for i.MX8MP
- Fix off by one in imx_lpcg_parse_clks_from_dt()
- Rework for the imx pll14xx
- sama7g5: One low priority fix for GCLK of PDMC
- Add DMA engine (SYS-DMAC) clocks on Renesas R-Car S4-8
- Add MOST (MediaLB I/F) clocks on Renesas R-Car E3 and D3
- Add CAN-FD clocks on Renesas R-Car V3U
- Qualcomm SC8280XP RPMCC
- Add some missing clks on Qualcomm MSM8992/MSM8994/MSM8998 SoCs
- Rework Qualcomm GCC bindings and convert SDM845 camera bindig to
YAML
- Convert various Qualcomm drivers to use clk_parent_data
- Remove test clocks from various Qualcomm drivers
- Crypto engine clks on Qualcomm IPQ806x + more freqs for SDCC/NSS
- Qualcomm SM8150 EMAC, PCIe, UFS GDSCs
- Better pixel clk frequency support on Qualcomm RCG2 clks"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (227 commits)
clk: zynq: Update the parameters to zynq_clk_register_periph_clk
clk: zynq: trivial warning fix
clk: Drop the rate range on clk_put()
clk: test: Test clk_set_rate_range on orphan mux
clk: Initialize orphan req_rate
dt-bindings: clock: drop useless consumer example
dt-bindings: clock: renesas: Make example 'clocks' parsable
clk: qcom: gcc-msm8994: Fix gpll4 width
dt-bindings: clock: fix dt_binding_check error for qcom,gcc-other.yaml
clk: rs9: Add Renesas 9-series PCIe clock generator driver
clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index()
clk: visconti: prevent array overflow in visconti_clk_register_gates()
dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator
clk: sifive: Move all stuff into SoCs header files from C files
clk: sifive: Add SoCs prefix in each SoCs-dependent data
riscv: dts: Change the macro name of prci in each device node
dt-bindings: change the macro name of prci in header files and example
clk: sifive: duplicate the macro definitions for the time being
clk: qcom: sm6125-gcc: fix typos in comments
clk: ti: clkctrl: fix typos in comments
...
…/git/i3c/linux Pull i3c updates from Alexandre Belloni: - support dynamic addition of i2c devices * tag 'i3c/for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux: i3c: fix uninitialized variable use in i2c setup i3c: support dynamically added i2c devices i3c: remove i2c board info from i2c_dev_desc
…git/remoteproc/linux Pull rpmsg updates from Bjorn Andersson: "The major part of the rpmsg changes for v5.18 relates to improvements in the rpmsg char driver, which now allow automatically attaching to rpmsg channels as well as initiating new communication channels from the Linux side. The SMD driver is moved to arch_initcall with the purpose of registering root clocks earlier during boot. Also in the SMD driver, a workaround for the resource power management (RPM) channel is introduced to resolve an issue where both the RPM and Linux side waits for the other to close the communication established by the bootloader - this unblocks support for clocks and regulators on some older Qualcomm platforms" * tag 'rpmsg-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: rpmsg: ctrl: Introduce new RPMSG_CREATE/RELEASE_DEV_IOCTL controls rpmsg: char: Introduce the "rpmsg-raw" channel rpmsg: char: Add possibility to use default endpoint of the rpmsg device rpmsg: char: Refactor rpmsg_chrdev_eptdev_create function rpmsg: Update rpmsg_chrdev_register_device function rpmsg: Move the rpmsg control device from rpmsg_char to rpmsg_ctrl rpmsg: Create the rpmsg class in core instead of in rpmsg char rpmsg: char: Export eptdev create and destroy functions rpmsg: char: treat rpmsg_trysend() ENOMEM as EAGAIN rpmsg: qcom_smd: Fix redundant channel->registered assignment rpmsg: use struct_size over open coded arithmetic rpmsg: smd: allow opening rpm_requests even if already opened rpmsg: qcom_smd: Promote to arch_initcall
…/git/remoteproc/linux Pull hwspinlock updates from Bjorn Andersson: "This updates sprd and srm32 drivers to use struct_size() instead of their open-coded equivalents. It also cleans up the omap dt-bindings example" * tag 'hwlock-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: hwspinlock: sprd: Use struct_size() helper in devm_kzalloc() hwspinlock: stm32: Use struct_size() helper in devm_kzalloc() dt-bindings: hwlock: omap: Remove redundant binding example
…git/remoteproc/linux Pull remoteproc updates from Bjorn Andersson: "In the remoteproc core, it's now possible to mark the sysfs attributes read only on a per-instance basis, which is then used by the TI wkup M3 driver. Also, the rproc_shutdown() interface propagates errors to the caller and an array underflow is fixed in the debugfs interface. The rproc_da_to_va() API is moved to the public API to allow e.g. child rpmsg devices to acquire pointers to memory shared with the remote processor. The TI K3 R5F and DSP drivers gains support for attaching to instances already started by the bootloader, aka IPC-only mode. The Mediatek remoteproc driver gains support for the MT8186 SCP. The driver's probe function is reordered and moved to use the devres version of rproc_alloc() to save a few gotos. The driver's probe function is also transitioned to use dev_err_probe() to provide better debug support. Support for the Qualcomm SC7280 Wireless Subsystem (WPSS) is introduced. The Hexagon based remoteproc drivers gains support for voting for interconnect bandwidth during launch of the remote processor. The modem subsystem (MSS) driver gains support for probing the BAM-DMUX driver, which provides the network interface towards the modem on a set of older Qualcomm platforms. In addition a number a bug fixes are introduces in the Qualcomm drivers. Lastly Qualcomm ADSP DeviceTree binding is converted to YAML format, to allow validation of DeviceTree source files" * tag 'rproc-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (22 commits) remoteproc: qcom_q6v5_mss: Create platform device for BAM-DMUX remoteproc: qcom: q6v5_wpss: Add support for sc7280 WPSS dt-bindings: remoteproc: qcom: Add SC7280 WPSS support dt-bindings: remoteproc: qcom: adsp: Convert binding to YAML remoteproc: k3-dsp: Add support for IPC-only mode for all K3 DSPs remoteproc: k3-dsp: Refactor mbox request code in start remoteproc: k3-r5: Add support for IPC-only mode for all R5Fs remoteproc: k3-r5: Refactor mbox request code in start remoteproc: Change rproc_shutdown() to return a status remoteproc: qcom: q6v5: Add interconnect path proxy vote remoteproc: mediatek: Support mt8186 scp dt-bindings: remoteproc: mediatek: Add binding for mt8186 scp remoteproc: qcom_q6v5_mss: Fix some leaks in q6v5_alloc_memory_region remoteproc: qcom_wcnss: Add missing of_node_put() in wcnss_alloc_memory_region remoteproc: qcom: Fix missing of_node_put in adsp_alloc_memory_region remoteproc: move rproc_da_to_va declaration to remoteproc.h remoteproc: wkup_m3: Set sysfs_read_only flag remoteproc: Introduce sysfs_read_only flag remoteproc: Fix count check in rproc_coredump_write() remoteproc: mtk_scp: Use dev_err_probe() where possible ...
…kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "This time we have bunch of driver updates and some new device support. New support: - Document RZ/V2L and RZ/G2UL dma binding - TI AM62x k3-udma and k3-psil support Updates: - Yaml conversion for Mediatek uart apdma schema - Removal of DMA-32 fallback configuration for various drivers - imx-sdma updates for channel restart" * tag 'dmaengine-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (23 commits) dmaengine: hisi_dma: fix MSI allocate fail when reload hisi_dma dmaengine: dw-axi-dmac: cleanup comments dmaengine: fsl-dpaa2-qdma: Drop comma after SoC match table sentinel dt-bindings: dma: Convert mtk-uart-apdma to DT schema dmaengine: ppc4xx: Make use of the helper macro LIST_HEAD() dmaengine: idxd: Remove useless DMA-32 fallback configuration dmaengine: qcom_hidma: Remove useless DMA-32 fallback configuration dmaengine: sh: Kconfig: Add ARCH_R9A07G054 dependency for RZ_DMAC config option dmaengine: ti: k3-psil: Add AM62x PSIL and PDMA data dmaengine: ti: k3-udma: Add AM62x DMSS support dmaengine: ti: cleanup comments dmaengine: imx-sdma: clean up some inconsistent indenting dmaengine: Revert "dmaengine: shdma: Fix runtime PM imbalance on error" dmaengine: idxd: restore traffic class defaults after wq reset dmaengine: altera-msgdma: Remove useless DMA-32 fallback configuration dmaengine: stm32-dma: set dma_device max_sg_burst dmaengine: imx-sdma: fix cyclic buffer race condition dmaengine: imx-sdma: restart cyclic channel if needed dmaengine: iot: Remove useless DMA-32 fallback configuration dmaengine: ptdma: handle the cases based on DMA is complete ...
…/kernel/git/broonie/regulator Pull regulator fixes from Mark Brown: "A couple of fixes for the rt4831 driver which fix features that didn't work due to incomplete description of the register configuration" * tag 'regulator-fix-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: regulator: rt4831: Add active_discharge_on to fix discharge API regulator: rt4831: Add bypass mask to fix set_bypass API work
…rnel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This contains conversions of some more drivers to the atomic API as well as the addition of new chip support for some existing drivers. There are also various minor fixes and cleanups across the board, from drivers to device tree bindings" * tag 'pwm/for-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (45 commits) pwm: rcar: Simplify multiplication/shift logic dt-bindings: pwm: renesas,tpu: Do not require pwm-cells twice dt-bindings: pwm: tiehrpwm: Do not require pwm-cells twice dt-bindings: pwm: tiecap: Do not require pwm-cells twice dt-bindings: pwm: samsung: Do not require pwm-cells twice dt-bindings: pwm: intel,keembay: Do not require pwm-cells twice dt-bindings: pwm: brcm,bcm7038: Do not require pwm-cells twice dt-bindings: pwm: toshiba,visconti: Include generic PWM schema dt-bindings: pwm: renesas,pwm: Include generic PWM schema dt-bindings: pwm: sifive: Include generic PWM schema dt-bindings: pwm: rockchip: Include generic PWM schema dt-bindings: pwm: mxs: Include generic PWM schema dt-bindings: pwm: iqs620a: Include generic PWM schema dt-bindings: pwm: intel,lgm: Include generic PWM schema dt-bindings: pwm: imx: Include generic PWM schema dt-bindings: pwm: allwinner,sun4i-a10: Include generic PWM schema pwm: pwm-mediatek: Beautify error messages text pwm: pwm-mediatek: Allocate clk_pwms with devm_kmalloc_array pwm: pwm-mediatek: Simplify error handling with dev_err_probe() pwm: brcmstb: Remove useless locking ...
…rnel/git/mcgrof/linux Pull module update from Luis Chamberlain: "There is only one patch which qualifies for modules for v5.18-rc1 and its a small fix from Dan Carpenter for lib/test_kmod module. The rest of the changes are too major and landed in modules-testing too late for inclusion. The good news is that most of the major changes for v5.19 is going to be tested very early through linux-next. This simple fix is all we have for modules for v5.18-rc1" * tag 'modules-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/linux: lib/test: use after free in register_test_dev_kmod()
…ernel/git/deller/parisc-linux Pull more parisc architecture updates from Helge Deller: - Revert a patch to the invalidate/flush vmap routines which broke kernel patching functions on older PA-RISC machines. - Fix the kernel patching code wrt locking and flushing. Works now on B160L machine as well. - Fix CPU IRQ affinity for LASI, WAX and Dino chips - Add CPU hotplug support - Detect the hppa-suse-linux-gcc compiler when cross-compiling * tag 'for-5.18/parisc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Fix patch code locking and flushing parisc: Find a new timesync master if current CPU is removed parisc: Move common_stext into .text section when CONFIG_HOTPLUG_CPU=y parisc: Rewrite arch_cpu_idle_dead() for CPU hotplugging parisc: Implement __cpu_die() and __cpu_disable() for CPU hotplugging parisc: Add PDC locking functions for rendezvous code parisc: Move disable_sr_hashing_asm() into .text section parisc: Move CPU startup-related functions into .text section parisc: Move store_cpu_topology() into text section parisc: Switch from GENERIC_CPU_DEVICES to GENERIC_ARCH_TOPOLOGY parisc: Ensure set_firmware_width() is called only once parisc: Add constants for control registers and clean up mfctl() parisc: Detect hppa-suse-linux-gcc compiler for cross-building parisc: Clean up cpu_check_affinity() and drop cpu_set_affinity_irq() parisc: Fix CPU affinity for Lasi, WAX and Dino chips Revert "parisc: Fix invalidate/flush vmap routines"
Whenever a buddy page is found, page_is_buddy() should be called to check its validity. Add the missing check during pageblock merge check. Fixes: 1dd214b ("mm: page_alloc: avoid merging non-fallbackable pageblocks with others") Link: https://lore.kernel.org/all/20220330154208.71aca532@gandalf.local.home/ Reported-and-tested-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Zi Yan <ziy@nvidia.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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