RDP The Graphics Processor

Command Interface

TODO: Complete documentation on the DPC registers

The RDP status register defines bits 9 and 10 as start valid and end value.

I believe 0 represents valid, and 1 represents invalid according the way the graphics ucode uses the start valid bit.

It seems that the RDP would turn on these bits when it starts processing a display list, when it finishes, they get turned off. The RSP gfx ucode stalls till the start bit is in valid state, meaning it waits for the RDP to be finished with the start register, and that the RSP is allowed to continue pushing more display commands to the RDP.