PYNQ Python code: How to use AXI-Stream to deliver Vector-Type variable?

[b07901181]

Hi. I am using AXI Stream interface to transmit a vector type data. As in the following code, I pack a vector in hls::axis and then I pack it in hls::stream.

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typedef signed int int32_t;
typedef hls::vector<int32_t, 8> int32_vt;
typedef hls::axis<int32_vt,1,1,1> value_t;
typedef hls::stream<value_t> stream_t;

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I have passed CSim, CSynth, CoSim, and used Vivado to generate the .bit and .hwh files. (I have also checked that the TLAST signal is correct.) But I don't know how to write the Python code to run it on FPGA.
I have tried to use np.int32 Buffer or the buffer below:

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dt = np.dtype((np.int32, 8))
Buffer = allocate(shape=(NumSample,), dtype=dt)

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But both of them have the same problem that they cannot pass recvchannel.wait(), as the following error shows:

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Does anyone know how to solve this?
Thanks.

[jiinlai]

Refer to: https://docs.xilinx.com/r/en-US/pg021_axi_dma/MM2S_DMASR-MM2S-DMA-Status-Register-Offset-04h
From the listing of dma.py, there 3 possible errors:

See if it provides any clues.

Jiin

[jiinlai]

See if you can print the returned error code, it may give you a better idea of which error is.

Jiin

[jiinlai]

I think the hang may be caused by the amount of return data being less than the buffer size. Refer to the ppt below. Please check the loop count for the return data.