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ref: move store16 function into a class (Bits16) #828

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Merged
boriel merged 1 commit into from
Oct 9, 2024
Merged

ref: move store16 function into a class (Bits16) #828

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90 changes: 45 additions & 45 deletions src/arch/z80/backend/_16bit.py
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Original file line number Diff line number Diff line change
Expand Up @@ -1011,33 +1011,23 @@ def load16(cls, ins: Quad) -> list[str]:
output.append("push hl")
return output

@classmethod
def store16(cls, ins: Quad) -> list[str]:
"""Stores 2nd operand content into address of 1st operand.
store16 a, x => *(&a) = x
Use '*' for indirect store on 1st operand.
"""
output = Bits16.get_oper(ins[2])

def _store16(ins: Quad) -> list[str]:
"""Stores 2nd operand content into address of 1st operand.
store16 a, x => *(&a) = x
Use '*' for indirect store on 1st operand.
"""
output = Bits16.get_oper(ins[2])
value = ins[1]
indirect = False

value = ins[1]
indirect = False
try:
if value[0] == "*":
indirect = True
value = value[1:]

try:
if value[0] == "*":
indirect = True
value = value[1:]

value = int(value) & 0xFFFF
if indirect:
output.append("ex de, hl")
output.append("ld hl, (%s)" % str(value))
output.append("ld (hl), e")
output.append("inc hl")
output.append("ld (hl), d")
else:
output.append("ld (%s), hl" % str(value))
except ValueError:
if value[0] in "_.":
value = int(value) & 0xFFFF
if indirect:
output.append("ex de, hl")
output.append("ld hl, (%s)" % str(value))
Expand All @@ -1046,32 +1036,42 @@ def _store16(ins: Quad) -> list[str]:
output.append("ld (hl), d")
else:
output.append("ld (%s), hl" % str(value))
elif value[0] == "#":
value = value[1:]
if indirect:
except ValueError:
if value[0] in "_.":
if indirect:
output.append("ex de, hl")
output.append("ld hl, (%s)" % str(value))
output.append("ld (hl), e")
output.append("inc hl")
output.append("ld (hl), d")
else:
output.append("ld (%s), hl" % str(value))
elif value[0] == "#":
value = value[1:]
if indirect:
output.append("ex de, hl")
output.append("ld hl, (%s)" % str(value))
output.append("ld (hl), e")
output.append("inc hl")
output.append("ld (hl), d")
else:
output.append("ld (%s), hl" % str(value))
else:
output.append("ex de, hl")
output.append("ld hl, (%s)" % str(value))
if indirect:
output.append("pop hl")
output.append("ld a, (hl)")
output.append("inc hl")
output.append("ld h, (hl)")
output.append("ld l, a")
else:
output.append("pop hl")

output.append("ld (hl), e")
output.append("inc hl")
output.append("ld (hl), d")
else:
output.append("ld (%s), hl" % str(value))
else:
output.append("ex de, hl")
if indirect:
output.append("pop hl")
output.append("ld a, (hl)")
output.append("inc hl")
output.append("ld h, (hl)")
output.append("ld l, a")
else:
output.append("pop hl")

output.append("ld (hl), e")
output.append("inc hl")
output.append("ld (hl), d")

return output
return output


def _jzero16(ins: Quad) -> list[str]:
Expand Down
5 changes: 2 additions & 3 deletions src/arch/z80/backend/main.py
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,6 @@
_jzero16,
_param16,
_ret16,
_store16,
)

# 32 bit bitwise operations
Expand Down Expand Up @@ -413,10 +412,10 @@ def _set_quad_table(self):
2, Bits8.store8
), # STORE nnnn, X -> Stores X at position N (Type of X determines X size)
ICInstruction.STOREI16: ICInfo(
2, _store16
2, Bits16.store16
), # STORE nnnn, X -> Stores X at position N (Type of X determines X size)
ICInstruction.STOREU16: ICInfo(
2, _store16
2, Bits16.store16
), # STORE nnnn, X -> Stores X at position N (Type of X determines X size)
ICInstruction.STOREI32: ICInfo(
2, Bits32.store32
Expand Down