Bugsnax (PPSA01503)

[JJenkx]

Existing thread

• I searched this category for the title ID and no thread exists for this title on any platform.

Title

Bugsnax (PPSA01503)

Content version tested

02.000.000

AnyPS5 commit

main 6a6a35fdf5.

System tested

Linux 7.2.9 (Arch), Ryzen 9 7950X, Radeon RX 6650 XT, RADV Mesa 26.2.4, GCC, Release.

Furthest point

Boots (stops before the first frame)

What is shown

It stops 14 s in, before any frame is presented:

terminate called after throwing an instance of 'std::runtime_error'
  what():  dithered or rounded alpha-to-coverage is unsupported (register 0x2dc = 0x0000e701)

DB_ALPHA_TO_MASK = 0xe701 is the enable bit with quad offsets 3, 1, 2, 3 and no OFFSET_ROUND, so a dithered pattern. AnyPS5 accepts only 0xaa01, the undithered setting (all four offsets at 2), as recorded in docs/dev/debt/libSceAgcDriver.md (alpha-to-coverage entry, from #3228). I found no open PR for dithered alpha-to-coverage.

Current blocker

Dithered alpha-to-coverage (DB_ALPHA_TO_MASK = 0xe701) is unimplemented in the AGC driver.

How it was run

relinker --registry --rpath <build>/core/libs/libs --module-dir . eboot.elf app.elf

libfmod.prx and libfmodstudio.prx sit in the title root and are converted with --module-dir .. This dump has no PlayGo files, so it was run with APS5_PLAYGO_UNLISTED_CHUNKS=installed.

AI-assisted testing and report: yes, Claude Code.

[MarcZX10]

Could you capture the complete state for the draw that first rejects DB_ALPHA_TO_MASK=0xe701—especially raster/DB_EQAA sample counts, the MRT0 export format, and whether alpha-to-coverage is disabled by DB_SHADER_CONTROL? The merged #4451 path emulates 0x18701 for eight matched samples; this value has offsets 3,1,2,3 with OFFSET_ROUND=0, so the register word alone does not show whether it can share that implementation or needs a separate coverage rule. Those details would let us scope a focused regression and avoid treating distinct modes as equivalent.

[JJenkx]

@MarcZX10 here is the state of the draw that first rejects DB_ALPHA_TO_MASK = 0xe701.

It was captured on main ea695358ee with a local diagnostic print in DrawRejection. The print is not part of any PR.

2dc=0000e701 203=00000050 2f8=00108001 201=00101001 1c5=00000004 1c4=00000000 292=00000003 200=00000036
2fe=0000c44c 2ff=00000000 318=0288c000 31c=0000e028 31d=00009000 08e=0000000f 08f=0000000f

Decoded:

• DB_ALPHA_TO_MASK 0xe701: enable bit set; quad offsets 3, 1, 2, 3 for pixels X0Y0, X1Y0, X0Y1, X1Y1; OFFSET_ROUND 0.
• DB_SHADER_CONTROL 0x50: ALPHA_TO_MASK_DISABLE (bit 11) is clear, so alpha-to-coverage is in effect. Z_ORDER 1 and KILL_ENABLE are set.
• PA_SC_AA_CONFIG 0x108001: MSAA_NUM_SAMPLES 1 (2 samples), MSAA_EXPOSED_SAMPLES 1, MAX_SAMPLE_DIST 4.
• DB_EQAA 0x101001:
  • MAX_ANCHOR_SAMPLES 1 and ALPHA_TO_MASK_NUM_SAMPLES 1 (2 samples);
  • PS_ITER_SAMPLES 0 and MASK_EXPORT_NUM_SAMPLES 0;
  • STATIC_ANCHOR_ASSOCIATIONS set.
• PA_SC_MODE_CNTL_0 0x3: MSAA_ENABLE set.
• PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0xc44c: the standard 2x pattern, (-4, +4) and (+4, -4).
• SPI_SHADER_COL_FORMAT 4: MRT0 export is FP16_ABGR. SPI_SHADER_Z_FORMAT is 0, so there is no mask export.
• CB_COLOR0_ATTRIB 0x9000: NUM_SAMPLES 1 (2 samples), NUM_FRAGMENTS 1. The target masks are 0xf.

So this is a two-sample target with dithered alpha-to-coverage in effect: offsets 3, 1, 2, 3, no rounding, standard locations. That is a different sample count and offset set from the measured 0x18701 eight-sample table, so it cannot share that table. It needs its own two-sample rule, measured for these offsets. Mesa programs neither this register value nor a two-sample dithered table, so I plan to measure it on a Radeon RX 6650 XT (gfx1032) with a locally patched RADV that writes 0xe701, then pin the result in AlphaToCoverage.cpp as #4451 did.

AI-assisted: yes (Claude Code)