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Description
Dear DANA team,
When I run "make fpga-images-zedboard/boot.bin CONFIG=DanaZedboardConfig"
to build for the FPGA(zedboard) , something happened:
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INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[9]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[0]'
INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[8]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[0]'
INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[7]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[0]'
INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[5]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[0]'
INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[6]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[0]'
INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[0]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[1]'
INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[1]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[2]'
INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[2]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[3]'
INFO: [Synth 8-3886] merging instance 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[3]' (FDE) to 'DefaultCoreplexi_7/DebugModule/CONTROLReg_hartid_reg[4]'
INFO: [Synth 8-3333] propagating constant 0 across sequential element (DefaultCoreplexi_7/DebugModule/\CONTROLReg_hartid_reg[4] )
/opt/Xilinx/Vivado/2016.2/bin/loader: line 164: 5092 Killed "$RDI_PROG" "$@"
[Sun Mar 8 01:36:49 2020] synth_1 finished
wait_on_run: Time (s): cpu = 00:00:00.12 ; elapsed = 00:13:18 . Memory (MB): peak = 1134.066 ; gain = 0.000 ; free physical = 1060 ; free virtual = 1307
launch_runs impl_1 -to_step write_bitstream
ERROR: [Common 17-70] Application Exception: Failed to launch run 'impl_1' due to failures in the following run(s):
synth_1
These failed run(s) need to be reset prior to launching 'impl_1' again.
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The process was interrupted.