aarch64: Fix miscompile lowering the extr instruction#12907
Merged
cfallin merged 1 commit intobytecodealliance:mainfrom Mar 31, 2026
Merged
aarch64: Fix miscompile lowering the extr instruction#12907cfallin merged 1 commit intobytecodealliance:mainfrom
extr instruction#12907cfallin merged 1 commit intobytecodealliance:mainfrom
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This commit fixes a miscompile in the lowering of the `extr` instruction for the aarch64 backend where one of the shift operands is 0. In this edge case the generated `extr` instruction did not match the input CLIF semantics, calculating a different value. The fix here is to only use the `extr` instruction when both immediates are larger than 0.
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This commit fixes a miscompile in the lowering of the
extrinstruction for the aarch64 backend where one of the shift operands is 0. In this edge case the generatedextrinstruction did not match the input CLIF semantics, calculating a different value. The fix here is to only use theextrinstruction when both immediates are larger than 0.