Ddl

.gdbinit

@@ -0,0 +1,6 @@
+set confirm off
+set architecture riscv:rv64
+target remote 127.0.0.1:25000
+symbol-file build/os
+set disassemble-next-line auto
+set riscv use-compressed-breakpoints yes

.gitignore

@@ -1,4 +1,5 @@
 build/
 .vscode/
 tmp/
-local/
+local/
+*.img

Makefile

@@ -24,12 +24,8 @@ OBJS = $(C_OBJS) $(AS_OBJS)
 
 HEADER_DEP = $(addsuffix .d, $(basename $(C_OBJS)))
 
-ifeq (,$(findstring link_app.o,$(OBJS)))
-	AS_OBJS += $(OBJDIR)/$K/link_app.o
-endif
-
 ifndef CPUS
-CPUS := 4
+CPUS := 1  # temporary
 endif
 
 CFLAGS = \
@@ -39,7 +35,12 @@ CFLAGS = \
 -nostdlib \
 -fno-pie -no-pie \
 -Wno-builtin-declaration-mismatch \
-# -T $(K)/kernel.lds
+-Wl,--no-warn-rwx-segments \
+-fno-omit-frame-pointer \
+-ffreestanding \
+-mno-relax \
+-march=rv64gc \
+
 
 # log flags
 LOG ?= error
@@ -83,10 +84,10 @@ kernel/kernel_app.ld: scripts/kernelld.py
 
 generate_link: kernel/kernel_app.ld kernel/link_app.S
 
-build_kernel: generate_link build_os
+build_kernel: build_os
 
 build_os: $(OBJS)
-	$(LD) $(LDFLAGS) -T kernel/kernel_app.ld -o $(OBJDIR)/os $(OBJS)
+	$(LD) $(LDFLAGS) -T kernel/kernel.lds -o $(OBJDIR)/os $(OBJS)
 	$(OBJDUMP) -S $(OBJDIR)/os > $(OBJDIR)/os.asm
 	$(OBJDUMP) -t $(OBJDIR)/os | sed '1,/SYMBOL TABLE/d; s/ .* / /; /^$$/d' > $(OBJDIR)/os.sym
 	@echo 'Build kernel done'
@@ -101,18 +102,45 @@ QEMUOPTS = \
 	-machine virt \
 	-bios default \
 	-kernel build/os \
-	-drive file=$(U)/fs-copy.img,if=none,format=raw,id=x0 \
-    -device virtio-blk-device,drive=x0,bus=virtio-mmio-bus.0
+	-drive file=./sdcard.img,if=none,format=raw,id=x0 \
+	-device virtio-blk-device,drive=x0,bus=virtio-mmio-bus.0 \
+	-initrd ./build/initrd.img
 
-run: build_kernel
-	$(CP) $(U)/fs.img $(U)/fs-copy.img
+run: build_kernel initrd.img
 	$(QEMU) $(QEMUOPTS)
 
 $(OBJDIR):
 	@mkdir -p $(OBJDIR)
 
+initrd.img:
+	-sudo umount ./build/initrd.img
+	dd if=/dev/zero of=./build/initrd.img bs=512 count=81920
+	sudo mkfs.vfat -F 32 ./build/initrd.img
+	-mkdir ./build/mnt
+	sudo mount ./build/initrd.img ./build/mnt
+	sudo mkdir ./build/mnt/bin
+	sudo mkdir ./build/mnt/mnt
+	sudo cp ./usr/build/init ./build/mnt
+	sudo umount ./build/initrd.img
+
+initcode:
+	$(CC) $(CFLAGS) -march=rv64g -nostdinc -I. -Ikernel -c usr/src/initcode.S -o usr/build/initcode.o
+	$(LD) $(LDFLAGS) -N -e start -Ttext 0 -o usr/build/initcode.out usr/build/initcode.o
+	$(OBJCOPY) -S -O binary usr/build/initcode.out usr/build/initcode
+	$(OBJDUMP) -S usr/build/initcode.o > usr/build/initcode.asm
+
 clean:
-	rm -rf $(OBJDIR) nfs/fs kernel/kernel_app.ld kernel/link_app.S
+	rm -rf $(OBJDIR)
+	rm -rf ./usr/build/*
+
+
+# try to generate a unique GDB port
+GDBPORT = $(shell expr `id -u` % 5000 + 25000)
+# QEMU's gdb stub command line changed in 0.11
+QEMUGDB = $(shell if $(QEMU) -help | grep -q '^-gdb'; \
+	then echo "-gdb tcp::$(GDBPORT)"; \
+	else echo "-s -p $(GDBPORT)"; fi)
 
-user:
-	make -C user
+qemu-gdb: build_kernel .gdbinit initrd.img initcode
+	@echo "*** Now run 'gdb' in another window." 1>&2
+	$(QEMU) $(QEMUOPTS) -S $(QEMUGDB)

doc/内存管理.md

@@ -0,0 +1 @@
+# 内存管理

doc/初始化.md

@@ -0,0 +1,11 @@
+# 初始化
+
+## 裸机启动
+
+    在裸机启动后，qemu 首先运行了 opensbi（默认参数 -bios default ），sbi 在经过一系列的初始化（M 态）后将跳转到内核文件（elf）指定的程序入口，在 fw_jump 固件下将会跳转到指定地址（0x80200000），并运行我们的代码中的 kernel/entry.S 中的代码，类似于函数调用
+
+```c
+_entry(uint64_t hartid, uint64_t dtb_address);
+```
+
+其中参数通过寄存器传值。

include/arch/cpu.h

@@ -1,11 +1,8 @@
-#if !defined(CPU_H)
+#ifndef CPU_H
 #define CPU_H
 
 #include "common/defs.h"
-
-#ifndef NCPU
-#define NCPU (1)  // TODO: support multicore
-#endif // NCPU
+#include "arch/hw.h"
 
 extern volatile int booted[NCPU];
 extern volatile int halted[NCPU];
@@ -35,7 +32,7 @@ struct cpu {
   struct proc *proc;      // The process running on this cpu, or null.
   struct context prev_context; // swtch() here to enter scheduler().
   uint32_t intr_disable_depth;   // Depth of push_off() nesting.
-  uint64_t prev_intr_status;  // Were interrupts enabled before push_off()?      
+  uint64_t prev_intr_status;  // Were interrupts enabled before push_off()?
 };
 
 // debug print

include/arch/hw.h

@@ -23,6 +23,8 @@
 
 #define VIRT_MMIO_PLIC_BASE 0xc000000
 #define VIRT_MMIO_PLIC_SIZE (0x200000 + NCPU * 0x1000)
+#define INITRD_START 0x84200000
+#define INITRD_END 0x86a00000
 
 // qemu puts platform-level interrupt controller (PLIC) here.
 #define PLIC 0x0c000000L       // 192 MB
@@ -35,6 +37,10 @@
 #define PLIC_MCLAIM(hart) (PLIC + 0x200004 + (hart)*0x2000)
 #define PLIC_SCLAIM(hart) (PLIC + 0x201004 + (hart)*0x2000)
 
-#define USTACK_BOTTOM 0xC0000000   // 3GB, user stack lower address 
+#define USTACK_BOTTOM 0xC0000000   // 3GB, user stack lower address
+#define UTEXT_START 0x1000
 
-#endif
+#define VKSTACK                 0x3EC0000000L
+#define VUSTACK                 0x70000000
+
+#endif

include/arch/riscv.h

@@ -173,11 +173,11 @@ static inline void w_pmpcfg0(uint64_t x)
 
 // Supervisor Status Register, sstatus
 
-#define SSTATUS_UIE (1 << 0) // User Interrupt Enable
-#define SSTATUS_SIE (1 << 1) // Supervisor Interrupt Enable
-#define SSTATUS_UPIE (1 << 4) // User Previous Interrupt Enable
-#define SSTATUS_SPIE (1 << 5) // Supervisor Previous Interrupt Enable
-#define SSTATUS_SPP (1 << 8) // Previous mode, 1=Supervisor, 0=User
+#define SSTATUS_UIE (1L << 0) // User Interrupt Enable
+#define SSTATUS_SIE (1L << 1) // Supervisor Interrupt Enable
+#define SSTATUS_UPIE (1L << 4) // User Previous Interrupt Enable
+#define SSTATUS_SPIE (1L << 5) // Supervisor Previous Interrupt Enable
+#define SSTATUS_SPP (1L << 8) // Previous mode, 1=Supervisor, 0=User
 
 static inline uint64_t r_stvec()
 {
@@ -327,23 +327,41 @@ static inline void w_sstatus(uint64_t x)
       :
       : "r"(x));
 }
-/*don't use it
-static inline void intr_disable()
-{
-  uint64_t sstatus_scratch;
-  sstatus_scratch = r_sstatus();
-  sstatus_scratch &= ~MSTATUS_SIE;
-  w_sstatus(sstatus_scratch);
+
+// wall clock tik counter
+static inline uint64_t r_time() {
+  uint64_t x;
+  asm volatile("csrr %0, time"
+               : "=r"(x));
+  return x;
 }
 
-static inline void intr_enable()
-{
-  uint64_t sstatus_scratch;
-  sstatus_scratch = r_sstatus();
-  sstatus_scratch |= ~MSTATUS_SIE;
-  w_sstatus(sstatus_scratch);
+// machine clock cycle counter
+static inline uint64_t r_cycle() {
+  uint64_t x;
+  asm volatile("csrr %0, cycle"
+               : "=r"(x));
+  return x;
+}
+
+// enable device interrupts
+static inline void intr_enable() { w_sstatus(r_sstatus() | SSTATUS_SIE); }
+
+// disable device interrupts
+static inline void intr_disable() { w_sstatus(r_sstatus() & ~SSTATUS_SIE); }
+
+// are device interrupts enabled?
+static inline int intr_get() {
+  uint64_t x = r_sstatus();
+  return (x & SSTATUS_SIE) != 0;
+}
+
+static inline uint64_t r_sp() {
+  uint64_t x;
+  asm volatile("mv %0, sp"
+               : "=r"(x));
+  return x;
 }
-*/
 
 // read and write tp, the thread pointer, which holds
 // this core's hartid (core number), the index into cpus[].
@@ -362,6 +380,13 @@ static inline void w_tp(uint64_t x)
                : "r"(x));
 }
 
+static inline uint64_t r_ra() {
+  uint64_t x;
+  asm volatile("mv %0, ra"
+               : "=r"(x));
+  return x;
+}
+
 static inline void sfence_vma(void)
 {
   asm(
@@ -370,4 +395,32 @@ static inline void sfence_vma(void)
     :);
 }
 
+/**
+ * RISC-V floating-point control and status register
+ */
+
+#define SSTATUS_FS_INIT		(1L << 13)
+#define SSTATUS_FS_CLEAN	(2L << 13)
+#define SSTATUS_FS_DIRTY	(3L << 13)
+#define SSTATUS_FS_BITS		(3L << 13)
+
+
+// 浮点舍入模式
+#define FRM_RNE		0
+#define FRM_RTZ		1
+#define FRM_RDN		2
+#define FRM_RUP		3
+#define FRM_RMM		4
+
+static inline uint64_t r_sstatus_fs()
+{
+	return r_sstatus() & SSTATUS_FS_BITS;
+}
+
+static inline void w_sstatus_fs(uint64_t bits)
+{
+	uint64_t status = r_sstatus() & ~SSTATUS_FS_BITS;
+	w_sstatus(status | (bits & SSTATUS_FS_BITS));
+}
+
 #endif

include/arch/timer.h

@@ -0,0 +1,71 @@
+#ifndef TIMER_H
+#define TIMER_H
+
+#include "common/defs.h"
+#include "lock/spinlock.h"
+#define TIME_SLICE_PER_SEC 100    // 10 ms
+#define MSEC_PER_SEC 1000    // 1s = 1000 ms
+#define USEC_PER_SEC 1000000 // 1s = 1000000 us
+
+#define TICK_FREQ 1000000    // 1 MHz   FUF740-C000 for csr time
+#define TICK_TO_MS(tick) ((tick) / (TICK_FREQ / MSEC_PER_SEC))
+#define TICK_TO_US(tick) ((tick) / (TICK_FREQ / USEC_PER_SEC)) // not accurate
+#define US_TO_TICK(us) ((us) * (TICK_FREQ / USEC_PER_SEC))
+#define MS_TO_TICK(ms) ((ms) * (TICK_FREQ / MSEC_PER_SEC))
+#define SECOND_TO_TICK(sec) ((sec)*TICK_FREQ)
+
+#define CYCLE_FREQ 3000000000    // 3 GHz I guess  for csr cycle
+#define CYCLE_TO_MS(cycle) ((cycle) / (CYCLE_FREQ / MSEC_PER_SEC))
+#define CYCLE_TO_US(cycle) ((cycle) / (CYCLE_FREQ / USEC_PER_SEC)) 
+#define MS_TO_CYCLE(ms) ((ms) * (CYCLE_FREQ / MSEC_PER_SEC))
+#define SECOND_TO_CYCLE(sec) ((sec)*CYCLE_FREQ)
+
+#define NTIMER 10
+
+struct timeval {
+    uint64_t tv_sec;
+    uint64_t tv_usec;
+};
+
+struct timespec {
+    uint64_t tv_sec;
+    uint64_t tv_nsec;
+};
+
+struct timezone {
+    int tz_minuteswest;
+    int tz_dsttime;
+};
+
+struct timer {
+    uint64_t wakeup_tick;
+    bool valid;
+    struct spinlock guard_lock;
+};
+
+struct tm {
+    int tm_sec;
+    int tm_min;
+    int tm_hour;
+    int tm_mday;
+    int tm_mon;
+    int tm_year;
+    int tm_wday;
+    int tm_yday;
+    int tm_isdst;
+};
+
+uint64_t get_time_ms();
+uint64_t get_time_us();
+uint64_t get_tick();
+
+void start_timer_interrupt();
+
+void stop_timer_interrupt();
+
+struct timer *add_timer(uint64_t expires_us);
+int del_timer(struct timer *timer);
+void try_wakeup_timer();
+uint64_t get_min_wakeup_tick();
+
+#endif // TIMER_H

include/common/common.h

@@ -1,2 +1,3 @@
 #include "defs.h"
-#include "log.h"
+#include "log.h"
+#include "assert.h"