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v0.7.9.9-alpha

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@cbroschard cbroschard released this 08 May 19:54

v0.7.9.9-alpha

This alpha release continues the emulator accuracy push from the last couple of weeks, with major work focused on VIC-II timing/graphics behavior, SID audio accuracy, chip model selection, and cleaner program/cartridge loading behavior.

Highlights

  • Continued VIC-II hardware accuracy improvements across raster timing, badline behavior, bus arbitration, border handling, and pixel-phase rendering.
  • Improved SID emulation accuracy, including better register handling, filter routing, OSC3/ENV3 reads, audio underrun behavior, and 6581/8580 model selection.
  • Added/expanded SID chip model selection so the emulator can switch between MOS 6581 and MOS 8580 behavior.
  • Fixed PRG loading flow so loading a PRG performs a cleaner machine reset path, including cold reset behavior and cartridge detach handling.
  • Improved emulator stability and diagnostics around display, audio, CPU, and media loading behavior.

VIC-II Accuracy Updates

This release includes another round of VIC-II accuracy work aimed at making raster effects, scrolling, badlines, and graphics modes behave closer to real hardware.

Raster, badline, and display timing

  • Improved badline timing behavior and diagnostics.
  • Separated predicted badline bus-warning behavior from sampled badline DMA-steal behavior.
  • Continued work on display progression timing, including first badline behavior and display sequencer state.
  • Improved handling of DEN, YSCROLL, display-enabled state, and badline sampling visibility.
  • Added/expanded diagnostics to help inspect badline state, display progression, raster timing, and internal VIC sequencing.

BA/AEC and bus arbitration

  • Continued cleanup and refinement of VIC-II bus ownership tracking.
  • Improved BA/AEC behavior around badline warning cycles and DMA steal cycles.
  • Added more explicit cycle/bus-owner style diagnostics to make CPU/VIC contention easier to debug.
  • Optimized parts of the render/bus timing path to avoid regressions in games sensitive to performance, such as Pac-Man.

Border and raster latch behavior

  • Improved border timing/latch behavior.
  • Added or preserved raster-based color latch state for save/load behavior.
  • Improved visibility into border open/close behavior through monitor/debug tooling.
  • Continued work toward more accurate mid-raster color and register behavior.

Graphics rendering path

  • Continued work on moving the VIC rendering path toward more cycle-aware and pixel-aware behavior.
  • Added pixel-aware helper paths for resolving VIC state at a specific raster/pixel position, including D016/D018 and graphics memory base helpers.
  • Improved groundwork for multicolor bitmap/text accuracy.
  • Continued investigation of multicolor bitmap artifacts seen in titles such as RoboCop 3.
  • Improved diagnostics to help isolate whether artifacts are coming from bitmap sampling, pipeline stepping, or final framebuffer composition.

Sprite and DMA-related groundwork

  • Continued sprite DMA and raster latch investigation.
  • Added/expanded state preservation and diagnostics around sprite priority, multicolor enable, sprite colors, and raster-specific sprite behavior.
  • Improved internal visibility into sprite DMA state and raster interaction.

SID Accuracy and Audio Updates

This release includes several SID-focused fixes and accuracy improvements, especially around register behavior, model-specific sound, and audio smoothness.

SID register correctness

  • Corrected handling of $D417 and $D418.
    • $D417 now correctly represents RES/FILT, including resonance and voice filter routing bits.
    • $D418 now correctly represents MODE/VOL, including filter mode bits, volume, and voice 3 direct-path behavior.
  • Improved filter routing behavior so voices are routed through the filter based on the proper SID register bits.
  • Implemented more accurate OSC3 and ENV3 read behavior at $D41B and $D41C.

SID model selection

  • Added/expanded SID chip model selection support.
  • Emulator can now distinguish between MOS 6581 and MOS 8580 behavior.
  • Added model selection plumbing through the SID/voice/audio path.
  • Improved groundwork for model-specific DAC behavior, tonal differences, and filter behavior.
  • Added UI/configuration-facing support so the selected SID model can be exposed and controlled more cleanly.

Envelope and clicking/choppiness work

  • Improved SID gate/release behavior so envelope release does not abruptly reset the level.
  • Removed hard audio cutoffs that could introduce clicks during envelope tests.
  • Improved handling of silent/no-waveform/test cases without forcing discontinuities into the output.
  • Continued work on SIDTester envelope test behavior, especially where rapid gate transitions caused clicks or choppy output.

Audio buffer and underrun behavior

  • Improved SID audio underrun handling.
  • Added/expanded underrun diagnostics.
  • Changed underrun behavior to avoid returning hard zeroes where possible, reducing audible discontinuities.
  • Improved audio generation path to reduce avoidable per-sample overhead and help prevent underrun-related choppiness.
  • Added better monitoring of generated/consumed samples, buffer depth, underruns, and audio health.

PRG Loading, Reset, and Cartridge Handling

This release improves the emulator’s PRG loading flow so switching from cartridge or other media into a PRG behaves more predictably.

  • Fixed PRG loading to use a cleaner reset path.
  • PRG loading now includes cold reset behavior where appropriate.
  • Loading a PRG now detaches the currently attached cartridge when needed.
  • Prevents stale cartridge mapping/state from interfering with newly loaded PRG programs.
  • Improved startup/load behavior when transitioning between cartridge tests, PRG files, and normal BASIC-style execution.
  • Reduced cases where the emulator could remain in an unexpected memory mapping state after media changes.

CPU and Bus Accuracy Fixes

This release also includes CPU-side accuracy improvements that support better compatibility with real C64 software.

  • Improved bus-visible dummy read behavior for indexed store operations.
  • Normalized dummy read addresses for unofficial indexed store opcodes such as AHX/TAS-style behavior.
  • Improved stack/control-flow dummy read behavior.
  • Improved decimal-mode ADC/SBC status handling.
  • Preserved more accurate pushed processor status behavior while keeping the internal B flag handling cleaner.
  • Continued work on IRQ/NMI timing behavior and CPU/VIC interaction.

Disk, Drive, and Media Updates

  • Continued work on disk/media handling paths used by the emulator.
  • Improved PRG overwrite behavior for D64-style workflows using scratch-then-save style logic.
  • Continued investigation and cleanup around 1541/1571/1581 behavior.
  • Improved diagnostics for IEC, drive state, and media activity.
  • Continued work toward more accurate ROM-controlled IEC behavior for drive emulation.

Monitor, Debugging, and Diagnostics

This release expands the emulator’s internal visibility, especially for hardware accuracy work.

  • Expanded VIC monitor/debug outputs for raster state, IRQs, latches, border state, badlines, and cycle-level behavior.
  • Expanded SID audio diagnostics for underruns, buffer depth, generated/consumed samples, and health state.
  • Improved logging and inspection paths for gate transitions, envelope behavior, and SID register writes.
  • Added more targeted diagnostics to help compare behavior against VICE and isolate hardware-timing issues.

Compatibility / Testing Notes

This release was tested and debugged against several timing-sensitive titles and tools, including:

  • SIDTester
  • Pac-Man / Ms. Pac-Man
  • RoboCop 2
  • RoboCop 3
  • Q*bert
  • Frog Master
  • Spy Hunter
  • BC’s Quest for Tires
  • Dig Dug
  • Ghostbusters

Known areas still under active development:

  • Multicolor bitmap timing/rendering still needs additional refinement.
  • RoboCop 3 still exposes remaining multicolor bitmap/raster artifacts.
  • Some raster IRQ effects still need tighter cycle-level behavior.
  • SIDTester envelope behavior is improved but still remains a key comparison target against VICE.
  • 1571/1581 ROM-controlled IEC behavior still needs more compatibility work.

Summary

v0.7.9.9-alpha is primarily an accuracy and stability release. The biggest improvements are in VIC-II timing groundwork, SID register/audio correctness, chip model selection, and safer PRG/cartridge transition behavior. These changes move the emulator closer to real C64 hardware behavior while also improving the debug tooling needed to keep refining compatibility.