Skip to content
View cliffpm's full-sized avatar

Achievements

Achievement: Quickdraw

Achievements

Achievement: Quickdraw

Block or report cliffpm

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
cliffpm/README.md

My work and area of focus is in System Programming and Embedded Systems as I really enjoy interacting with hardware from a software perspective. I also am very passionate and skilled in hardware design (RTL Design). Outside of the classroom, I am either playing tennis or exploring new hiking trails around Seattle. I also have a strong passion for cinematography and photography and love to capture memorable moments to look back on. I am currently a third-year student at the University of Washington and seeking for software and firmware internship positions to apply my studies towards real-world applications. I can be reached at: cliffpmdev@gmail.com

Top Langs

Popular repositories Loading

  1. cliffpm cliffpm Public

    Config files for my GitHub profile.

  2. dynamic-memory-management dynamic-memory-management Public

    dynamic memory allocator cloning malloc and free method in C's standard library.

    C

  3. basic-vector-c- basic-vector-c- Public

    Basic vector implementation in C++ showcasing dot products and scalar vector multiplication

    C++

  4. binarysearch-FPGA binarysearch-FPGA Public

    This is an implementation of the Binary Search Algorithm coded in System Verilog to run on an FPGA board. The code is organized via a top level module of the algorithm, followed by a control-unit m…

    SystemVerilog

  5. Bresenham-Algorithm Bresenham-Algorithm Public

    Implementation of Bresenham's Line Algorithm to display a line connecting from a beginning to a destination coordinate on a 640x480 VGA display monitor.

    SystemVerilog

  6. 344_test 344_test Public

    Forked from huayuww/344_test

    Jupyter Notebook