[P1] Model dataflow accelerator based on specs

[tancheng]

The specs can be represented in protobuff/json, which can be used by both compiler and RTL.

[tancheng]

Hi @YanzhouTang, if you have bandwidth, can you help check whether the current compiler works as expected when we changing the arch spec?

dataflow/test/e2e/fir/fir_kernel.mlir

Lines 17 to 31 in 19f2a17

	// RUN: --architecture-spec=../../arch_spec/architecture.yaml \
	// RUN: --generate-code -o %t-mapping.mlir
	// RUN: FileCheck %s --input-file=%t-mapping.mlir -check-prefix=MAPPING
	// RUN: FileCheck %s --input-file=tmp-generated-instructions.yaml --check-prefix=YAML
	// RUN: FileCheck %s --input-file=tmp-generated-instructions.asm --check-prefix=ASM
	// MAPPING: module
	// MAPPING: func.func
	// MAPPING-SAME: compiled_ii = 5
	// MAPPING-SAME: mapping_mode = "spatial-temporal"
	// MAPPING-SAME: mapping_strategy = "heuristic"
	// MAPPING-SAME: rec_mii = 5
	// MAPPING-SAME: res_mii = 2
	// MAPPING-SAME: x_tiles = 4
	// MAPPING-SAME: y_tiles = 4

Say, if we decrease the CGRA size defined in the arch.yaml from 4x4 to 2x2, would the resMII increase, and the compiledII increase?

[YanzhouTang]

Hi @YanzhouTang, if you have bandwidth, can you help check whether the current compiler works as expected when we changing the arch spec?

dataflow/test/e2e/fir/fir_kernel.mlir

Lines 17 to 31 in 19f2a17

// RUN: --architecture-spec=../../arch_spec/architecture.yaml \
// RUN: --generate-code -o %t-mapping.mlir
// RUN: FileCheck %s --input-file=%t-mapping.mlir -check-prefix=MAPPING
// RUN: FileCheck %s --input-file=tmp-generated-instructions.yaml --check-prefix=YAML
// RUN: FileCheck %s --input-file=tmp-generated-instructions.asm --check-prefix=ASM

// MAPPING: module
// MAPPING: func.func
// MAPPING-SAME: compiled_ii = 5
// MAPPING-SAME: mapping_mode = "spatial-temporal"
// MAPPING-SAME: mapping_strategy = "heuristic"
// MAPPING-SAME: rec_mii = 5
// MAPPING-SAME: res_mii = 2
// MAPPING-SAME: x_tiles = 4
// MAPPING-SAME: y_tiles = 4
Say, if we decrease the CGRA size defined in the arch.yaml from 4x4 to 2x2, would the resMII increase, and the compiledII increase?

I've tried with 2x2 config in e2e/fir testcase, and the res_mii increases from 2 to 5, the compiled_ii increases from 5 to 6. So the arch spec will take effect if we use --architecture-spec=../../arch_spec/architecture.yaml PASS.

BTW, I also tried the multi_cgra_defaults config in the arch spec, and the multi CGRA property seems not to be supported now.

[tancheng]

Thanks @YanzhouTang, can you help to check whether the mapper not only respect the size of CGRA, but also respect the supported operations?

For example, by default, we don't provide ld/st for all the tiles, but override the left-most tiles with ld/st using

dataflow/test/arch_spec/arch_spec_example.yaml

Line 58 in 19f2a17

operations: ["load"]

then the mapper shouldn't map load/store instructions/operations on other tiles:

dataflow/include/NeuraDialect/Architecture/Architecture.h

Line 110 in 19f2a17

bool canSupportOperation(OperationKind operation) const {

[YanzhouTang]

Thanks @YanzhouTang, can you help to check whether the mapper not only respect the size of CGRA, but also respect the supported operations?

For example, by default, we don't provide ld/st for all the tiles, but override the left-most tiles with ld/st using

dataflow/test/arch_spec/arch_spec_example.yaml

Line 58 in 19f2a17

operations: ["load"]
then the mapper shouldn't map load/store instructions/operations on other tiles:

dataflow/include/NeuraDialect/Architecture/Architecture.h

Line 110 in 19f2a17

bool canSupportOperation(OperationKind operation) const {

I checked the override function. After fixing a pointer bug #206 , the override can be used correctly now.

For example, if we only activate left-most tiles with ld/st using override, our mapper would only map ld/st to left-most tiles.

[tancheng]

Thanks @YanzhouTang~!

Can you also help check:

• What about the multi-cgra, would the cgra mapping only respect the [0, 0] CGRA, if the other cgra config is changed, it won't affect the mapping.
• What about the tile_override/link_override's existence? i.e., if a tile or link existence field is false, would the mapping be affected?