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Codegen Folded-Constant Handling#291

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ShangkunLi merged 15 commits intomainfrom
testbench
Mar 23, 2026
Merged

Codegen Folded-Constant Handling#291
ShangkunLi merged 15 commits intomainfrom
testbench

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@n0thingNoob
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@n0thingNoob n0thingNoob commented Mar 19, 2026

#284
Implement missing folded-constant handling in GenerateCodePass so codegen can correctly reconstruct source operand order for:
add/sub/mul/div/rem/fadd/fsub/fmul/fdiv/icmp/fmax/fmin/shl/and/or/store/gep/load_indexed/store_indexed/grant_once/grant_always

For GEP:
%9 = "neura.gep"(%8) <{operandSegmentSizes = array<i32: 0, 1>}> {dfg_id = 15 : i32, lhs_value = "%arg0", mapping_locs = [{id = 6 : i32, index_per_ii = 2 : i32, invalid_iterations = 0 : i32, resource = "tile", time_step = 2 : i32, x = 2 : i32, y = 1 : i32}]} : (!neura.data<i64, i1>) -> !neura.data<!llvm.ptr, i1>

after codegen:
PE(2,1):
{
GEP, [arg0], [NORTH, RED] -> [SOUTH, RED] (t=2, inv_iters=0)
} (idx_per_ii=2)

Copilot AI review requested due to automatic review settings March 19, 2026 00:31
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Pull request overview

Updates GenerateCodePass to account for constant operands that were folded into operation attributes, so the emitted instruction stream preserves the original source operand ordering needed by downstream asm/yaml consumers.

Changes:

  • Add operand-slot reconstruction for folded lhs_value / rhs_value attributes while preserving rewiring alignment.
  • Special-case StoreIndexedOp to insert a folded rhs_value (base) before index operands rather than appending at the end.

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@tancheng
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Implement missing folded-constant handling in GenerateCodePass so codegen can correctly reconstruct source operand order for: add/sub/mul/div/rem/fadd/fsub/fmul/fdiv/icmp/fmax/fmin/shl/and/or/store/gep/load_indexed/store_indexed/grant_once/grant_always

Can we have IR (before and after this PR's changes) examples for store_indexed and grant_once for both lhs and rhs constant?

@n0thingNoob
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n0thingNoob commented Mar 19, 2026

Implement missing folded-constant handling in GenerateCodePass so codegen can correctly reconstruct source operand order for: add/sub/mul/div/rem/fadd/fsub/fmul/fdiv/icmp/fmax/fmin/shl/and/or/store/gep/load_indexed/store_indexed/grant_once/grant_always

Can we have IR (before and after this PR's changes) examples for store_indexed and grant_once for both lhs and rhs constant?

I followed the /lib/NeuraDialect/Transforms/Optimizations/HwAgnosticOpt/FoldConstantPass.cpp to add those insts. I haven't see an example of load_indexed, store_indexed, and also grant_always. Maybe I can find a grant_once example IR.

%0 = "neura.grant_once"() <{constant_value = "%arg0"}>
this grant_once is already handled, it will become something like this:
GRANT_ONCE, [arg0] -> [$0]

@tancheng
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after codegen:

PE(2,1):
{
GEP, [arg0], [NORTH, RED] -> [SOUTH, RED] (t=2, inv_iters=0)
} (idx_per_ii=2)

This is thanks to your PR? Then what it looks like before your PR?

@n0thingNoob
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after codegen:

PE(2,1):
{
GEP, [arg0], [NORTH, RED] -> [SOUTH, RED] (t=2, inv_iters=0)
} (idx_per_ii=2)

This is thanks to your PR? Then what it looks like before your PR?

Before is only GEP, [NORTH, RED] -> [SOUTH, RED]

@tancheng
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after codegen:

PE(2,1):
{
GEP, [arg0], [NORTH, RED] -> [SOUTH, RED] (t=2, inv_iters=0)
} (idx_per_ii=2)

This is thanks to your PR? Then what it looks like before your PR?

Before is only GEP, [NORTH, RED] -> [SOUTH, RED]

So we wrongly miss (forget to handle) all lhs const cases?

@n0thingNoob
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after codegen:

PE(2,1):
{
GEP, [arg0], [NORTH, RED] -> [SOUTH, RED] (t=2, inv_iters=0)
} (idx_per_ii=2)

This is thanks to your PR? Then what it looks like before your PR?

Before is only GEP, [NORTH, RED] -> [SOUTH, RED]

So we wrongly miss (forget to handle) all lhs const cases?

We've already handled some LHS constant cases in our previous kernel simulations. Since I wasn't aware of the fold_constant file back then, I could only address the specific cases we encountered during those runs.

@ShangkunLi ShangkunLi merged commit bc71a57 into main Mar 23, 2026
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4 participants