Smaller than 32bit data path possible?

[fiskn]

Hi,

Is creating a CPU architecture with a data path smaller than 32 bits possible? In the compiler it seems there is a check in place to make sure there is at least one 32bit Register. It also appears that LD32 is a required operation, rather than splitting a 32bit variable into 4x8bit loads into 4x8bit registers.

I would like to experiment with making a 8bit TTA style CPU and using oacc to compile C for the architecture.

[pjaaskel]

You are right, the C/C++ compiler requires a 32b datapath currently. In our group we don't currently have needs to support lower bitwidths, but are happy to review any pull requests.

The assembler (tceasm) can compile TTA assembly to any TTA target, however.

[fiskn]

Thanks for the confirmation. I will have a look through the code and see if I can understand what would need doing.