Workaround for CPUs that don't support clflush

[crozone]

The clflush instruction is for the most part only supported by CPUs with SSE2 extensions.

If we want to test younger CPUs that lack the clflush instruction, we need to find a workaround for flushing the cache. This is required to test anything pre Pentium 4.

This should be implemented behind #ifdef DNOCLFLUSH in the same manner that the rdtscp -> rdtsc compatibility patch was implemented.

[Postrediori]

FYI GoogleProjectZero reported PoC written in JavaScript exists for the V8 engine. The method of flushing the cache is described in https://spectreattack.com/spectre.pdf:

The clflush instruction is not accessible from JavaScript, so cache flushing was performed by reading
a series of addresses at 4096-byte intervals out of a large array. Because of the memory and cache configuration on Intel processors, a series of ˜2000 such reads (depending on the processor’s cache size) were adequate evict out the data from the processor’s caches for addresses having the same value in address bits 11–6 [38].

[crozone]

Should be closed by #7

[crozone]

Reopening, I had false positives on an AMD chip. The fix does not work on Intel yet.

[Postrediori]

Improved cache flushing in #8.

[crozone]

One _mm_clflush remains. Need to figure out how to effectively replace it.

[Postrediori]

Replacing the clflush that is left can be done by initiating the cache thrashing. I'm now experimenting with ineffective reading from a 2D array

  int m[256][256]; 
  for (column=0; column<256; column++) { 
    for (row=0; row<256; row++) {
      junk = m[row][column];
    } 
  }

Reading from memory columns by rows causes rows to re-load cache lines on each iteration.
But this method is still very unstable.