Wrong register decoding in execute_op16_special_data_branch

[Ko-]

Hi! I was trying this simulator and I noticed that I had an instruction mov r12, ... that somehow was writing to r8 according to the simulator. That shouldn't happen, of course. I checked the architecture reference manual and it seems like there's an off-by-one in the decoding of the following instructions:

• ADD with register, encoding T2
• CMP with register, encoding T2
• MOV with register, encoding T1

I'll submit a PR that fixes this.