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pinctrl: renesas: Remove unneeded locking around sh_pfc_read() calls
There is no need to acquire the spinlock when reading from a pin controller register: 1. Reading a single MMIO register is an atomic operation, 2. While sh_pfc_phys_to_virt() inside sh_pfc_read() has to traverse all mapped windows to find the appropriate virtual address, this does not need any locking, as the window mappings are never changed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/2008ca99f0079fd5d4e640b7ef78710c98cc9f77.1637143108.git.geert+renesas@glider.be
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drivers/pinctrl/renesas/pinctrl.c

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -504,7 +504,6 @@ static u32 sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc,
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static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc,
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unsigned int pin)
506506
{
507-
unsigned long flags;
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unsigned int offset;
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unsigned int size;
510509
u32 reg;
@@ -514,11 +513,7 @@ static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc,
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if (!reg)
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return -EINVAL;
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517-
spin_lock_irqsave(&pfc->lock, flags);
518-
val = sh_pfc_read(pfc, reg);
519-
spin_unlock_irqrestore(&pfc->lock, flags);
520-
521-
val = (val >> offset) & GENMASK(size - 1, 0);
516+
val = (sh_pfc_read(pfc, reg) >> offset) & GENMASK(size - 1, 0);
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/* Convert the value to mA based on a full drive strength value of 24mA.
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* We can make the full value configurable later if needed.
@@ -648,9 +643,7 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
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if (WARN(bit < 0, "invalid pin %#x", _pin))
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return bit;
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651-
spin_lock_irqsave(&pfc->lock, flags);
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val = sh_pfc_read(pfc, pocctrl);
653-
spin_unlock_irqrestore(&pfc->lock, flags);
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655648
lower_voltage = (pin->configs & SH_PFC_PIN_VOLTAGE_25_33) ?
656649
2500 : 1800;

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