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@kroening kroening commented Sep 2, 2025

Our extractbit IR expression requires a bit-vector argument. This change converts booleans to bit-vectors when used as vector argument for a Verilog bit select expression.

Our extractbit IR expression requires a bit-vector argument.  This change
converts booleans to bit-vectors when used as vector argument for a Verilog
bit select expression.
@tautschnig tautschnig merged commit 107677c into main Sep 8, 2025
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@tautschnig tautschnig deleted the index-constant-fix branch September 8, 2025 07:33
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