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This adds parsing, typechecking and synthesis for the Verilog compound assignment operators.

This adds parsing, typechecking and synthesis for the Verilog compound
assignment operators.
@kroening kroening marked this pull request as ready for review July 17, 2024 21:03
@tautschnig tautschnig merged commit 80c64af into main Jul 22, 2024
@tautschnig tautschnig deleted the verilog_blocking_assign branch July 22, 2024 07:56
Romy15200 pushed a commit to Romy15200/nws that referenced this pull request Aug 19, 2025
SystemVerilog: compound blocking assignments
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3 participants