v2.2.0 "Coprocessor Online"

Rusty2600 v2.2.0 "Coprocessor Online"

Closes the final open item from the /goal directive that produced v2.1.0
"Follow-Through": ARM coprocessor cart-scheme wiring.

DPC+ (T-0401-006, BestEffort tier)

BankDpcPlus wires DPC+ — the first of the Harmony/Melody ARM-coprocessor
cart families — into rusty2600-cart::detect(), using the rusty2600-thumb
ARM7TDMI Thumb-1 interpreter that has existed unconsumed since v1.6.0.

A full port of Gopher2600's Go dpcplus package (not Stella's C++, matching
this project's established precedent for ARM-adjacent code):

• The complete $00..=$7F register window: RNG, 8 plain + 8 windowed + 8
  fractional data fetchers, FastFetch LDA #immediate redirection, and
  the $5A CALLFUNCTION register.
• DpcPlusArmMemory implements rusty2600_thumb::ThumbMemory over the
  board's driver/custom/data/freq ROM+RAM segments at Gopher2600's own
  Harmony-architecture addresses (Flash 0x0000_0000, SRAM 0x4000_0000).
• The ARM entry point ($5A write of 254/255) runs Arm7Tdmi::step()
  in a loop, synchronously, from within cpu_write — this needed no
  Bus/scheduler change at all, since DPC+'s CALLFUNCTION is
  call-and-run-to-completion, not a per-clock tick. A generous, documented
  step-count safety cap guards against a runaway/buggy ROM.
• Detected via content signature (the ASCII string "DPC+" occurring
  twice, matching Stella's own isProbablyDPCplus), not size alone.

Verified with a real hand-assembled Thumb-1 program (MOV/LDR
PC-relative/STRB/BX LR, opcodes hand-derived and cross-checked against
rusty2600-thumb's own format encoders) that actually executes via the
interpreter and writes a byte into data RAM through a genuine STRB
instruction — proving the ARM coprocessor actually runs, not just that
registers decode.

Honestly deferred, not silently dropped

• DPC+'s music-mode continuous-time audio (the reference's Step(clock)-
  driven phase accumulator) is not implemented — register plumbing
  round-trips correctly, but waveform sampling always reads index 0, so
  DPC+ music-mode audio is silent/incorrect on that one channel. A
  rusty2600-tia audio-timing follow-up, not a cart-catalogue one.
• Function-call service 2 ("copy value to fetcher, N times") is ported
  with Gopher2600's own address formula verbatim, including what looks
  like a copy-paste artifact (Hi is also advanced by the loop index, so
  it does not fill a contiguous block) — Stella can't cross-check this
  specific service, so it's ported exactly rather than "corrected" on a
  guess.
• CDF/CDFJ/CDFJ+ (the other three Harmony/Melody families) remain their own
  future, separately-scoped follow-up.

Doc fix found during this release's reconciliation

docs/cart.md's scheme-catalogue tally said "15 BestEffort (25 schemes),"
but the table itself has always had 16 BestEffort rows (26 total) — a stale
count predating F0/3F/3E being split into three distinct rows from the
source research report's combined "F0 / 3F-variants" draft entry. Corrected
the tally, not the catalogue — no scheme was added or removed by this fix.

24 of 26 schemes are now implemented and wired into detect(), leaving
E7 (T-0401-002, a pre-existing, unrelated gap) and CDF/CDFJ/CDFJ+ (this
release's own deliberately-deferred scope) as the two remaining entries.

Test count

295 tests passing on default features (299 with --features test-roms), up
from 283 at v2.1.0. Full CI green — Linux/macOS/Windows + the no_std
gate (confirming integer-only ARM emulation has no std-only dependencies).

The /goal directive, now complete

This release closes the last of four items requested via /goal for a
follow-up release after v2.0.0 "Parity": AR/Supercharger, real TIA paddle
timing, and Lua/netplay frontend wiring shipped in v2.1.0 "Follow-Through";
ARM coprocessor cart-scheme wiring ships here.

See CHANGELOG.md's [2.2.0] entry and to-dos/ROADMAP.md's "Beyond
v2.0.0" section for the full remaining open-work list.