Assignments

Digital IOs

FPGA Pendulum Waves

We are going to implement a digital version of the beautiful Pendulum Waves Experiment.

1. Extend the LED_blink example to use 8 independent counters for every LED of your Redpitaya-125-14 with independently controllable counter incr but common resetn.

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ℹ️ The AXI GPIO IP features only 2 register outputs. For more register outputs please use multiple instances of this IP or replace it by a AXI4 Register Bank IP instance, which has up to 16 independent register inputs/outputs.

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2. Extend the LED_blink.ipynb Jupyter Notebook to configure LED frequencies of the type:

   f[i] = f0 + i * df

   for i=0,1...,7 and where f0 is the base frequency and df the frequency increment.

PWM

In this assignment we are going to develop a Pulse Width Modulation (PWM) module.

1. Based on the counter.vhd, create a new VHDL module that:

   • Has a counter counter incr input (32 bits)
   • Has a duty_cycle input (32 bits)
   • Has a pwm_o output (1 bit)

2. Simulate and validate the new VHDL module (follow the instructions in Behavioral Simulation).

3. Connect the PWM module to the Redpitaya LEDs and verify that you can use it to dim the LED power.

4. Connect the PWM module to the pwm_o ports (requires to uncomment PWM DAC section in redpitaya-125-14.xdc) and verify on an oscilloscope that the you can use PWM in combination with the integrated low-pass filter to generate an analogue output.