GitHub - dvcolgan/simplifiedmipscpu: Complete working simulation of both a single-cycle and pipelined CPU. Implements a subset of the MIPS instruction set.

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
pipelinedcpu		pipelinedcpu
singlecyclecpu		singlecyclecpu
README.txt		README.txt

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David Colgan

A simplified MIPS CPU implementation.  Written in VHDL during my undergraduate Computer Architecture class.

Complete working simulation of both a single-cycle and pipelined CPU. Implements a subset of the MIPS instruction set.

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