Error: xtensa_wait_algorithm: not halted 0, pc 0x4000c2f6, ps 0x60025 (OCD-877) #308
Description
Development Kit
custom hardware without UART ports.
Module or chip used
esp32 wroom module
Debug Adapter
Segger Jlink
OpenOCD version
master open ocd branch(36eab91)
Operating System
kali linux x64
Using an IDE ?
eclipse
OpenOCD command line
sudo ./openocd -f interface/jlink.cfg -f board/esp-wroom-32.cfg -c "program_esp /home/fullstackcoder/thermo/basic/build/ethernet_basic.bin 0x10000 verify" -c "init; reset run"
JTAG Clock Speed
20000 Khz or 2000 Khz
ESP-IDF version
esp-idf-v5.1.2
Problem Description
I'm developing control software on ESP32 and we have a custom board which does not have UART pins.
I can debug esp firmware with jaylink without any error on eclipse ide. All debugging operations works perfectly. We program our board using Segger's jaylink without no problem until today.
Today, we implemented HTTP OTA firmware updater software on our codebase and tested 100 times without power interruption. For test purpose we cut the energy of ESP32 chip during ota upgrade(approximately %52 percent) and after that step, it seems esp32's flash chip is not accessible via jaylink. Init halt commands through jaylink works but esp32 hangs in openocd for all flash related command such as flash erase program esp program esp bins etc.
The existing code is works with command sudo ./openocd -f interface/jlink.cfg -f board/esp-wroom-32.cfg -c "init;halt; reset run" until spi flash write access from app code. I cannot flash application binary via jaylink no more.
I cannot find the main reason, what can be a problem?.
Thank you.
my partition table csv file is
# Name, Type, SubType, Offset, Size, Flags
nvs, data, nvs, 0x9000, 0x4000,
otadata, data, ota, 0xd000, 0x2000,
phy_init, data, phy, 0xf000, 0x1000,
ota_0, app, ota_0, 0x10000, 0x180000,
ota_1, app, ota_1, 0x190000, 0x180000,
storage, data, spiffs, 0x310000, 0x2800,
my esp32-wroom cfg file is
# SPDX-License-Identifier: GPL-2.0-or-later
source [find interface/jlink.cfg]
transport select jtag
set ESP32_FLASH_VOLTAGE 3.3
adapter speed 2000
source [find target/esp32.cfg]
└─$ sudo ./openocd -f interface/jlink.cfg -f board/esp-wroom-32.cfg -c "program_esp /home/fullstackcoder/thermo/basic/build/ethernet_basic.bin 0x190000 verify" -c "init; reset run"
Open On-Chip Debugger v0.12.0-esp32-20230921-199-g36eab91e (2023-12-27-05:16)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Warn : Interface already configured, ignoring
** program_esp input args <0x190000 verify> **
Info : J-Link ARM V8 compiled Nov 28 2014 13:44:46
Info : Hardware version: 8.00
Info : VTarget = 3.306 V
Info : clock speed 2000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : [esp32.cpu0] Examination succeed
Info : [esp32.cpu1] Examination succeed
Info : starting gdb server for esp32.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : [esp32.cpu0] requesting target halt and executing a soft reset
Info : [esp32.cpu0] Target halted, PC=0x4000C2F6, debug_reason=00000000
Info : [esp32.cpu0] Reset cause (3) - (Software core reset)
Info : Set GDB target to 'esp32.cpu0'
Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32.cpu1] Reset cause (14) - (CPU1 reset by CPU0)
Info : [esp32.cpu0] Debug controller was reset.
Info : [esp32.cpu0] Core was reset.
Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000
Info : [esp32.cpu0] Reset cause (3) - (Software core reset)
Info : [esp32.cpu1] requesting target halt and executing a soft reset
Info : [esp32.cpu0] Core was reset.
Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32.cpu1] Debug controller was reset.
Info : [esp32.cpu1] Core was reset.
Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32.cpu1] Reset cause (14) - (CPU1 reset by CPU0)
Info : [esp32.cpu0] Reset cause (3) - (Software core reset)
Error: timed out while waiting for target halted
Info : [esp32.cpu0] Target halted, PC=0x4000C2F6, debug_reason=00000000
Error: xtensa_wait_algorithm: not halted 0, pc 0x4000c2f6, ps 0x60025
Error: Failed to wait algorithm (-302)!
Error: Algorithm run failed (-302)!
Error: Failed to run flasher stub (-302)!
Warn : Failed to get flash mappings (-302)!
Error: Target is already running an algorithm
Error: Failed to start algorithm (-4)!
Error: Failed to run flasher stub (-4)!
Error: Target is already running an algorithm
Error: Failed to start algorithm (-4)!
Error: Failed to run flasher stub (-4)!
Error: Failed to probe flash, size 0 KB
Error: auto_probe failed
Error: Failed to find bank 'esp32.cpu0.flash'!
target/esp_common.cfg:9: Error:
at file "target/esp_common.cfg", line 9
Debug Logs
you can see openocd level 3 verbose log via link : https://pastebin.pl/view/298d31b0Expected behavior
─(fullstackcoder㉿fullstackcoder)-[~/Documents/openocd/openocd-esp32/tcl]
└─$ sudo ./openocd -f interface/jlink.cfg -f board/esp-wroom-32.cfg -c "program_esp /home/fullstackcoder/thermo/basic/build/ethernet_basic.bin 0x190000 verify" -c "init; reset run"
command should flash my application binary to partition and app code must work.
Screenshots
No response