acme

Work done in Scott Hauck's lab using Conifer to generate Verilog from a boosted decision tree.

Name		Name	Last commit message	Last commit date
Latest commit History 10 Commits
prj_1607565214		prj_1607565214
BDT_Jet_Classifier.ipynb		BDT_Jet_Classifier.ipynb
BDT_Tau_Classifier.ipynb		BDT_Tau_Classifier.ipynb
Conifer_Bitwidth_Profiler.ipynb		Conifer_Bitwidth_Profiler.ipynb
README.md		README.md
correlator2_hls4ml_setup.ipynb		correlator2_hls4ml_setup.ipynb

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