v0.2.5
What's new
Layerwise Richardson ZNE
Circuits with heterogeneous layer structure -- where multi-qubit gate density varies across layers -- now get a tailored ZNE configuration. When layer heterogeneity exceeds 2.0 and depth is in the 15-50 range, EMRG recommends RichardsonFactory with fold_gates_at_random instead of fold_global. This targets noise amplification at the most error-prone gates rather than scaling uniformly.
- New
layer_heterogeneityfield in circuit analysis output - Automatic layerwise detection -- no new flags needed
- Visible in
emrg analyze(table and JSON) and in generated code comments
Tutorial notebooks
Two complete, runnable Jupyter notebooks in docs/tutorials/:
- VQE H2 mitigation -- 4-qubit hardware-efficient ansatz, walks through analysis, ZNE recipe generation, and PEC comparison
- QAOA MaxCut mitigation -- 5-node graph with 2-layer QAOA, shows how deeper circuits get different EMRG recommendations
Bug fixes
recommend()now raisesValueErrorfor invalid technique strings instead of silently falling through to ZNE- Fixed
OverflowErrorin PEC overhead estimation on circuits with 200+ multi-qubit gates
Benchmarks
Updated benchmark suite with four parts: tool performance, ZNE fidelity, PEC vs ZNE head-to-head comparison, and layerwise vs global folding on high-heterogeneity circuits. PEC benchmarks now use meaningful test circuits and measure both single-qubit and multi-qubit observables.
Testing
- 284 tests, 99% coverage
- New permanent stress test suite (
tests/stress_test.py) covering edge cases, boundary conditions, and performance regression
Full changelog
feat(analyzer): add layer heterogeneity metricfeat(heuristics): add layerwise Richardson ZNE variantfeat(codegen): support layerwise ZNE code generationfeat(cli): show layer heterogeneity in analyze outputdocs: add VQE H2 and QAOA MaxCut tutorial notebooksfix: validate technique parameter in recommend()fix: prevent OverflowError in PEC overhead estimationbench: update benchmarks for v0.2.5 with PEC and layerwise resultsbench: improve PEC and layerwise benchmark circuits