Falis Konstantinos
Valasiadou Panagiota
This is a 3-part lab for the Computer Architecture course of the Electrical and Computer Engineering department in AUTH. Its main goal is to get familiar with CPU design using the gem5 simulator.
Lab 1: An intro to gem5 simulator
Lab 2: Design Space Exploration with gem5
Lab 3: Energy-Delay-Area Product Optimization (gem5+ McPAT)