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Backport T2S template fix to v1.2 #3936

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Merged
merged 1 commit into from
Jul 5, 2023
Merged

Backport T2S template fix to v1.2 #3936

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2 changes: 2 additions & 0 deletions CHANGELOG.md
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Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,8 @@
### Fixed

- Fixed passing through cache information from host in CPUID leaf 0x80000006.
- Fixed the T2S CPU template to set the RRSBA bit of the IA32_ARCH_CAPABILITIES
MSR to 1 in accordance with an Intel microcode update.

## [1.2.1]

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2 changes: 1 addition & 1 deletion resources/tests/msr/msr_list_T2S_4.14.csv
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Expand Up @@ -265,7 +265,7 @@ MSR_ADDR,STATUS,VALUE
0x107,unimplemented,0x0
0x108,unimplemented,0x0
0x109,unimplemented,0x0
0x10a,implemented,0xc4c
0x10a,implemented,0x80c4c
0x10b,unimplemented,0x0
0x10c,unimplemented,0x0
0x10d,unimplemented,0x0
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2 changes: 1 addition & 1 deletion resources/tests/msr/msr_list_T2S_5.10.csv
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Original file line number Diff line number Diff line change
Expand Up @@ -265,7 +265,7 @@ MSR_ADDR,STATUS,VALUE
0x107,unimplemented,0x0
0x108,unimplemented,0x0
0x109,unimplemented,0x0
0x10a,implemented,0xc4c
0x10a,implemented,0x80c4c
0x10b,unimplemented,0x0
0x10c,unimplemented,0x0
0x10d,unimplemented,0x0
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3 changes: 2 additions & 1 deletion src/cpuid/src/template/intel/t2s.rs
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Expand Up @@ -35,7 +35,8 @@ pub fn update_msr_entries(msr_entries: &mut Vec<kvm_msr_entry>) {
| ArchCapaMSRFlags::SKIP_L1DFL_VMENTRY
| ArchCapaMSRFlags::IF_PSCHANGE_MC_NO
| ArchCapaMSRFlags::MISC_PACKAGE_CTRLS
| ArchCapaMSRFlags::ENERGY_FILTERING_CTL;
| ArchCapaMSRFlags::ENERGY_FILTERING_CTL
| ArchCapaMSRFlags::RRSBA;
msr_entries.push(kvm_msr_entry {
index: MSR_IA32_ARCH_CAPABILITIES,
data: capabilities.bits(),
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