BUG-003-T27 · gf32_from_f64 НЕ реализует whitepaper layout [1:13:18] Lucas L₆
File: ffi/src/lib.rs · functions gf32_from_f64, gf32_to_f64
Severity: P0 — paperware vulnerability (claim ≠ implementation)
Symptom
// ffi/src/lib.rs (current)
const GF32_EXP_BIAS: i32 = 127; // ← IEEE 754 fp32 bias
const GF32_EXP_MASK: u32 = 0x7F80_0000; // ← IEEE 754 fp32 exp mask (8 bits)
const GF32_MANT_MASK: u32 = 0x007F_FFFF;// ← IEEE 754 fp32 mant mask (23 bits)
pub extern "C" fn gf32_from_f64(x: f64) -> u32 {
let f32_val = x as f32;
f32_val.to_bits() // ← это IEEE 754 fp32, без φ-mapping
}
Comment claims // GF32 uses same layout as IEEE f32 + φ-exp mapping but no mapping is applied. The function is a literal f64 → f32 → bits cast.
What whitepaper claims
gHashTag/zig-golden-float/docs/whitepaper.md §1.2:
GF32: [sign:1][exp:13][mant:18] · Lucas anchor L₆ = 18 = φ⁶+φ⁻⁶ (mantissa exact Lucas)
Current code: [sign:1][exp:8][mant:23] (IEEE fp32). Different format.
R5 verdict — paperware
| Source |
GF32 layout |
| whitepaper §1.2 |
1:13:18 |
| t27/ffi/lib.rs (this code) |
1:8:23 (IEEE fp32) |
| zig-golden-float/formats_root |
(not implemented) |
Whitepaper claim "GF32 mantissa = L₆ exact" is not backed by implementation.
Two paths
Path A: Implement [1:13:18] properly
const GF32_EXP_BITS: u32 = 13;
const GF32_MANT_BITS: u32 = 18;
const GF32_EXP_BIAS: i32 = (1 << 12) - 1; // 4095
const GF32_EXP_MASK: u32 = 0xFFF8_0000; // bits [30:18]
const GF32_MANT_MASK: u32 = 0x0003_FFFF; // bits [17:0]
Then encode/decode via integer ops (similar to GF16 pattern).
Path B: Retract whitepaper claim
If GF32 is intentionally IEEE-fp32-compatible (FPGA design choice for f32 drop-in replacement), whitepaper §1.2 must say so:
"GF32 reuses IEEE 754 fp32 layout (1:8:23) for FPGA f32 drop-in compatibility. The Lucas-L₆ mantissa-18 design is reserved for future GF32-PHI variant — not yet implemented."
Either path is fine — but paperware vulnerability must close.
Acceptance
EITHER:
- Path A: bit-level test that
gf32_from_f64(1.0) produces [exp_bits:13][mant_bits:18] with bias=4095
- Path B: whitepaper §1.2 updated with explicit "not implemented" disclaimer + ADR explaining design choice
Cross-references
phi^2 + phi^-2 = 3 · TRINITY · NEVER STOP
BUG-003-T27 ·
gf32_from_f64НЕ реализует whitepaper layout[1:13:18]Lucas L₆File:
ffi/src/lib.rs· functionsgf32_from_f64,gf32_to_f64Severity: P0 — paperware vulnerability (claim ≠ implementation)
Symptom
Comment claims
// GF32 uses same layout as IEEE f32 + φ-exp mappingbut no mapping is applied. The function is a literalf64 → f32 → bitscast.What whitepaper claims
gHashTag/zig-golden-float/docs/whitepaper.md§1.2:Current code:
[sign:1][exp:8][mant:23](IEEE fp32). Different format.R5 verdict — paperware
Whitepaper claim "GF32 mantissa = L₆ exact" is not backed by implementation.
Two paths
Path A: Implement
[1:13:18]properlyThen encode/decode via integer ops (similar to GF16 pattern).
Path B: Retract whitepaper claim
If GF32 is intentionally IEEE-fp32-compatible (FPGA design choice for f32 drop-in replacement), whitepaper §1.2 must say so:
Either path is fine — but paperware vulnerability must close.
Acceptance
EITHER:
gf32_from_f64(1.0)produces[exp_bits:13][mant_bits:18]with bias=4095Cross-references
phi^2 + phi^-2 = 3· TRINITY · NEVER STOP