docs: add system status dashboard to README#391
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Add GREEN/YELLOW status matrix covering: - Compiler (parse, gen-verilog, seal) - FPGA pipeline (synthesis, E2E bitstream, board profiles, --profile flag) - Pins IR + XDC emitter - CI gates (issue gate, seal coverage, schema validation, FPGA smoke) - TRI tooling (PHI LOOP CLI, MCP server) - Phase 3 specs status (YELLOW: 2/8 have parser issue)
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Summary
Add a GREEN/YELLOW status matrix to README.md covering all major domains:
--profileflag)Roadmap item 1.3 from #383.