Define default .ra rules for PPC and ARM#949
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Dav1dde
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Thanks, looks good! Mind adding 1 or 2 integration tests to tests/?
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Fixed the unused import in the master branch, CI should pass if you update the branch. |
Breakpad CFI readers [require][4] a .ra rule at every unwindable address, but DWARF INIT rows can omit the return-address register rule. That leaves function entry CFI unusable even though the return address lives in a fixed register by ABI. Add PowerPC register naming so LR can be emitted and use the CPU family to supply a default .ra on INIT rows for ARM, MIPS, and PowerPC when no explicit rule is present. Based on my research, this is required for [Arm32][2], [Arm64][3], [PPC][1]. Closes getsentry#948 [1]: https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html [2]: https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst [3]: https://student.cs.uwaterloo.ca/~cs452/docs/rpi4b/aapcs64.pdf [4]: https://github.com/rust-minidump/rust-minidump/blob/df483d5774cae0fa1bb847eaa3dd8f4a15c7e9d9/breakpad-symbols/src/sym_file/walker.rs#L514-L517
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@kuzaxak can you add 1 or 2 tests to the integration tests for aarch64 (or other architectures)? Or if you have rough instructions how to generate some test binaries, I can also look into it! |
@Dav1dde I was thinking to do it but I don't see a source code for the fixture app used in tests in the repo. I can add a simple rust app that will be compiled into a binary and commit both. |
That'd be awesome, but realizing we don't really have a good way setup to manage/generate these files. I guess I can just compile the files locally and check them in and in a follow-up think about a better organization. |
@Dav1dde, yes, and I don't see a way to run these tests in the GHA right now, as I don't see an ARM runner. |
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@kuzaxak I think easiest is just if I compile the binaries and check them in. The tests themselves should then not need an ARM runner as we just load the binaries. If you have a test file I can compile that'd be helpful otherwise I'll just reserve some time and figure out something, just a lot of other stuff on my plate. |
Commit befa7de adds logic to emit a default `.ra` rule on INIT rows for architectures where the return address is stored in a register by ABI convention. The DWARF CFI for ARM64 binaries specifies which column represents the return address (column 30 / x30) but does not emit an explicit rule stating the RA is in that register at function entry. The CIE only defines `DW_CFA_def_cfa` for the stack pointer, and leaf functions have no CFI operations beyond `DW_CFA_nop`. Without the default rule, unwinders lack the information needed to retrieve the return address from x30 at the start of functions that have not yet pushed LR to the stack. This commit adds an ARM64 ELF fixture and snapshot test to verify the fix works correctly. The fixture is compiled with -O2 to be representative of real-world binaries. The snapshot confirms all INIT rows include `.ra: x30` where DWARF omits an explicit rule.
@Dav1dde Added a commit with a simple C binary compiled to a binary, and based on it added a snapshot test. Without a fix, it is failing: |
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I think it is enough to consider the feature covered, WDYT? |
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@kuzaxak thanks for the contribution, will merge after tests and release a new version |
Breakpad CFI readers require a .ra rule at every unwindable address, but DWARF INIT rows can omit the return-address register rule. That leaves function entry CFI unusable even though the return address lives in a fixed register by ABI.
Add PowerPC register naming so LR can be emitted and use the CPU family to supply a default .ra on INIT rows for ARM, MIPS, and PowerPC when no explicit rule is present.
Based on my research, this is required for Arm32, Arm64, PPC.
Closes #948