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Qwen3.8 27B with MTP at a real 256K on one 24 GB GPU: numbers, and a drafter result I did not expect #27290
pich
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I spent the last weeks getting Qwen3.8 27B (dense, 3x Gated DeltaNet + 1 full-attention pattern, native 262144 ctx, 1-layer MTP head) into production on a single RTX PRO 4000 Blackwell SFF 24 GB, serving real agent work. Sharing the measured results because two of them seem useful to this project.
What runs: custom 5.01 BPW iMatrix/NVFP4 hybrid GGUF, embedded MTP with --spec-draft-n-max 8, Q4_0 KV for the target, F16 KV for the drafter, full 262144 context allocated, F16 mmproj on a second small card. Production mean 50.44 tok/s over ten runs. A genuinely filled cache (261.5K real input tokens, then generation) still decodes at 12.61 tok/s with about 515 MiB physical margin. Not a load-only claim; output hashes were checked cold vs hot.
Result 1: the runtime matters about as much as people hope. In a strict same-workload A/B with n-gram speculation disabled, clean master did 45.42 tok/s and master plus a small pinned set of PRs (#26001, #26048, #26705, the #27173 MTP chain, #24891, #25635) did 55.40 tok/s, +21.97%. The Flash Attention swizzling change alone was +7.4% prefill at 32K. Thanks to everyone behind those PRs.
Result 2, the one I did not expect: making the MTP head more precise made everything worse. I rebuilt the model with only the 8 MTP tensors changed (all 851 other tensors byte-identical): NVFP4 head 50.44 tok/s at 48.3% acceptance, iMatrix Q5_K head -3.4%, Q5_K+Q6_K head (+69 MiB) 37.02 tok/s at 33.1% acceptance. The higher-bit head is presumably closer to the BF16 parent, but the job is predicting this quantized target, and the NVFP4 errors in the head apparently line up with the NVFP4-heavy target. Is drafter-target quantization alignment something anyone else has measured? I did not find prior numbers.
Caveat I want to flag: with n_max=8 on a quantized target the outputs are not bitwise identical to target-only decoding, matching #25618. Both modes are internally deterministic.
Full write-up with the failed branches (DSpark sidecar on a second GPU lost to embedded MTP, ready-made NVFP4 quant failed PPL, n=9/10 hit CUDA graph allocation cliffs): https://piszczek.pl/blog/qwen38-27b-256k-50-tps-24gb-gpu
Model with checksums, tensor map and the pinned patch list: https://huggingface.co/cdiamond/Qwen3.8-27B-iMatrix-NVFP4-MTP-GGUF
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