TP: fix 0-sized tensor slices, AllReduce fallback

[JohannesGaessler]

Partially fixes #21765 .

With Qwen 3.5 26b a4b 27b there are only 2 KV heads so with 3+ GPUs some of them will get zero-sized slices of the data. This edge case is not being handled correctly on master. This PR makes it so that the corresponding nodes are disabled and the buffer for the AllReduce memset to 0 so that after the AllReduce all GPUs have the correct data. As of right now the buffer is zeroed out via GGML_SCALE with a factor of 0.0f for the AllReduce fallback implementation - this is not safe w.r.t. NaNs but it seems we currently lack the tooling to properly memset a tensor as part of a ggml_cgraph. The same issue is present in llm_graph_context::build_rs.

Additionally, on master the synchronization of 3+ GPUs is not being handled correctly for the AllReduce fallback. The problem is that in those cases 2+ reduction steps are needed but the same buffer is used for each step so there are race conditions. This PR extends the number of buffers accordingly.

Requirements

• I have read and agree with the contributing guidelines
• AI usage disclosure: No

[JohannesGaessler]

I added a patch for Gemma 4 26b a4b on 3 GPUs. There were issues with aliasing because every 6 layers the layer structure is different and one of the GPUs would receive no tensors at all. The linked issue should now be fully fixed by this PR.

[slavap]

Fails for me on four Instinct mi50 cards, BUT also fails on two with the same error, HIP_VISIBLE_DEVICES=0,1
Similar problem on 2 GPUs #21686
So it fails not only on 3+ GPUs.