pinctrl: cs42l43: Fix polarity on debounce

charleskeepax · gregkh · commit eb9280ea8dbd · 2026-07-24T16:15:54.000+02:00
[ Upstream commit 9da52ee ] The debounce bit sets a bypass on the debounce rather than enabling it, as such the current polarity of the debounce is set incorrectly. Invert the polarity to correct this. Fixes: d5282a5 ("pinctrl: cs42l43: Add support for the cs42l43") Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
diff --git a/drivers/pinctrl/cirrus/pinctrl-cs42l43.c b/drivers/pinctrl/cirrus/pinctrl-cs42l43.c
@@ -343,7 +343,7 @@ static int cs42l43_pin_set_db(struct cs42l43_pin *priv, unsigned int pin,
 
 	return regmap_update_bits(priv->regmap, CS42L43_GPIO_CTRL2,
 				  CS42L43_GPIO1_DEGLITCH_BYP_MASK << pin,
-				  !!us << pin);
+				  !us << pin);
 }
 
 static int cs42l43_pin_config_get(struct pinctrl_dev *pctldev,

Original file line number	Diff line number	Diff line change
`@@ -343,7 +343,7 @@ static int cs42l43_pin_set_db(struct cs42l43_pin *priv, unsigned int pin,`
`343`	`343`
`344`	`344`	`return regmap_update_bits(priv->regmap, CS42L43_GPIO_CTRL2,`
`345`	`345`	`CS42L43_GPIO1_DEGLITCH_BYP_MASK << pin,`
`346`		`- !!us << pin);`
	`346`	`+ !us << pin);`
`347`	`347`	`}`
`348`	`348`
`349`	`349`	`static int cs42l43_pin_config_get(struct pinctrl_dev *pctldev,`