Feature: CAS-based watermark advancement and slot-reuse validation#143
Conversation
Summary of ChangesHello, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed! This pull request significantly enhances the ring buffer flow control mechanism within the AICPU executor, particularly for long-running orchestrations in multi-threaded scenarios. By implementing a CAS-based watermark advancement for Highlights
🧠 New Feature in Public Preview: You can now enable Memory to help Gemini Code Assist learn from your team's feedback. This makes future code reviews more consistent and personalized to your project's style. Click here to enable Memory in your admin console. Changelog
Activity
Using Gemini Code AssistThe full guide for Gemini Code Assist can be found on our documentation page, here are some quick tips. Invoking Gemini You can request assistance from Gemini at any point by creating a comment using either
Customization To customize Gemini Code Assist for GitHub experience, repository maintainers can create a configuration file and/or provide a custom code review style guide (such as PEP-8 for Python) by creating and adding files to a Limitations & Feedback Gemini Code Assist may make mistakes. Please leave feedback on any instances where its feedback is incorrect or counter productive. You can react with 👍 and 👎 on @gemini-code-assist comments. If you're interested in giving your feedback about your experience with Gemini Code Assist for Github and other Google products, sign up here. You can also get AI-powered code generation, chat, as well as code reviews directly in the IDE at no cost with the Gemini Code Assist IDE Extension. Footnotes
|
There was a problem hiding this comment.
Code Review
This pull request introduces significant enhancements for flow control and slot reuse in the ring buffer, crucial for long-running orchestrations, using CAS-based watermark advancement and completed_by_task validation. However, the implementation introduces security risks related to handling untrusted data from shared memory, specifically lacking validation for offsets and indices in aicpu_executor.cpp which could lead to arbitrary memory reads or system-wide stalls (DoS). Additionally, the use of raw pointers in shared memory structures for heap reclamation is fragile and potentially exploitable. Furthermore, a critical race condition in the update logic for heap_tail could lead to performance degradation.
97d20d2 to
9325d17
Compare
…simulation thread starvation fix Add lock-free heap_tail/last_task_alive advancement in AICPU parallel mode with ticket-based generation counter (heap_tail_gen) to serialize concurrent heap_tail writes. Add completed_by_task array for slot-reuse validation in the orchestrator's early-return path, preventing stale state from recycled slots. Fix simulation thread starvation on resource-constrained CI runners (e.g., 2 CPU cores running 13+ threads) by introducing a platform-level SPIN_WAIT_HINT() macro for both AICore and AICPU idle polling loops. On simulation (a2a3sim), expands to CPU pause/yield hint + sched_yield() to let the OS scheduler give time slices to threads doing real work; on hardware (a2a3), expands to no-op. Without this, idle threads in tight spin loops starve the executing core, causing AICPU iteration-based timeouts (MAX_IDLE_ITERATIONS) before kernels can complete. Also fix race where scheduler threads could access orch_ready_queue pointers before Thread 3 finished initializing them (orch_pointers_ready_ guard). Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
9325d17 to
6ec38cb
Compare
…simulation thread starvation fix (hw-native-sys#143) Add lock-free heap_tail/last_task_alive advancement in AICPU parallel mode with ticket-based generation counter (heap_tail_gen) to serialize concurrent heap_tail writes. Add completed_by_task array for slot-reuse validation in the orchestrator's early-return path, preventing stale state from recycled slots. Fix simulation thread starvation on resource-constrained CI runners (e.g., 2 CPU cores running 13+ threads) by introducing a platform-level SPIN_WAIT_HINT() macro for both AICore and AICPU idle polling loops. On simulation (a2a3sim), expands to CPU pause/yield hint + sched_yield() to let the OS scheduler give time slices to threads doing real work; on hardware (a2a3), expands to no-op. Without this, idle threads in tight spin loops starve the executing core, causing AICPU iteration-based timeouts (MAX_IDLE_ITERATIONS) before kernels can complete. Also fix race where scheduler threads could access orch_ready_queue pointers before Thread 3 finished initializing them (orch_pointers_ready_ guard).
Add ring buffer flow control so scheduler threads advance last_task_alive and heap_tail after consuming tasks, enabling slot reuse for long-running orchestrations.
aicpu_executor.cpp:
pto_orchestrator.h/cpp: