[SYCL] PR 6 - Remove FPGA Attributes from SYCL FE#21785
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sarnex merged 3 commits intointel:syclfrom Apr 21, 2026
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Fznamznon
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Apr 16, 2026
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@intel/llvm-gatekeepers, any ideas about this failure in SYCL Pre Commit on Linux? error: variable 'eventRetains' set but not used [-Werror,-Wunused-but-set-global] The failure is in a unittest mock_opencl/mock_opencl.cpp, but the code that is being flagged has been there for nearly a year. Did the diagnostic severity change recently? |
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Not sure why it started failing now but a PR is open to fix it here #21814 |
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Thank you! |
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@premanandrao is this ready? |
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Yes, the Jenkins failure seems unrelated. |
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This removes the following attributes:
[[intel::loop_coalesce]]
[[intel::max_interleaving]]
[[intel::scheduler_target_fmax_mhz]]
[[intel::use_stall_enable_clusters]]