feat: Build wheel for riscv64 #95
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Co-authored by: nijincheng@iscas.ac.cn; Signed-off-by: ffgan <sudoemt@gmail.com>
Co-authored by: nijincheng@iscas.ac.cn; Signed-off-by: ffgan <sudoemt@gmail.com>
Co-authored by: nijincheng@iscas.ac.cn; Signed-off-by: ffgan <sudoemt@gmail.com>
Co-authored by: nijincheng@iscas.ac.cn; Signed-off-by: ffgan <sudoemt@gmail.com>
Co-authored by: nijincheng@iscas.ac.cn; Signed-off-by: ffgan <sudoemt@gmail.com>
Co-authored by: nijincheng@iscas.ac.cn; Signed-off-by: ffgan <sudoemt@gmail.com>
Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## master #95 +/- ##
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Coverage 94.71% 94.71%
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Files 10 10
Lines 3365 3365
Branches 151 151
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Hits 3187 3187
Misses 136 136
Partials 42 42
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Recently, riscv64 has gained wide use and adoption, so we can consider adding riscv64 support to the current project. I have been running CI in my fork, and the results show that everything is fine.
If you have any questions, feel free to @ me.
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Co-authored-by: Jincheng Ni nijincheng@iscas.ac.cn