[asm] Allow RawOp to reserve registers from regalloc#1156
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Hardcode84 wants to merge 4 commits intoiree-org:mainfrom
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[asm] Allow RawOp to reserve registers from regalloc#1156Hardcode84 wants to merge 4 commits intoiree-org:mainfrom
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RawOp embeds physical register names as opaque text, invisible to SSA-based liveness. When PrecoloredSRegOps are DCE'd (they have [Pure] and no SSA users), the allocator loses track of those registers and may assign them to loop iter_args, corrupting SRDs at runtime. Instead of parsing raw assembly text with regex in the allocator, add sreg_reads/vreg_reads/areg_reads optional DenseI64ArrayAttr attributes to RawOp so creation sites can declare which physical registers they read. The linear-scan pass now reserves registers from these attributes directly. Made-with: Cursor Signed-off-by: Ivan Butygin <ivan.butygin@gmail.com>
- Rename sreg_reads/vreg_reads/areg_reads to sreg_uses/vreg_uses/areg_uses
for generality (covers both reads and writes of physical registers).
- Replace two OpBuilders with a single one taking ArrayRef<int64_t> with
default = {} for all three register sets, eliminating DenseI64ArrayAttr
boilerplate and sregAttr lambdas at call sites.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Signed-off-by: Ivan Butygin <ivan.butygin@gmail.com>
- Dialect roundtrip test: verifies sreg_uses, vreg_uses, areg_uses parse and print correctly, including combinations and omission. - Regalloc test: verifies the linear-scan allocator reserves SGPRs declared in sreg_uses, forcing virtual registers to skip those positions. Includes baseline (no annotation) for comparison. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com> Signed-off-by: Ivan Butygin <ivan.butygin@gmail.com>
Remove the TODO and wire up vreg_uses/areg_uses reservation alongside the existing sreg_uses handling. All three register-use attributes now reserve their respective physical registers in the allocator. Add vreg_uses regalloc test cases alongside existing sreg_uses ones. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com> Signed-off-by: Ivan Butygin <ivan.butygin@gmail.com>
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Superseded by #1188 |
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RawOp embeds physical register names as opaque assembly text, invisible to SSA-based liveness. When PrecoloredSRegOps are DCE'd (they have
[Pure]and no SSA users), the allocator loses track of those registers and may assign them to loop iter_args, corrupting SRDs at runtime.This PR adds optional
sreg_uses/vreg_uses/areg_usesattributes towaveasm.rawso creation sites can declare which physical registers they reference. The linear-scan pass reserves registers from these attributes.Changes
sreg_uses/vreg_uses/areg_usesasOptionalAttr<DenseI64ArrayAttr>to RawOp with a convenienceArrayRef<int64_t>builder (empty = omitted).reservedSGPRs/reservedVGPRs/reservedAGPRssets before allocation.emitSRDPrologueandemitSRDBaseAdjustmentwhere physical register dependencies exist. Deliberately omit annotations on GFX950 preload-path RawOps where reservation would conflict with S_LOAD_DWORDX2 allocation (documented with comments).s_and_b32SRD word-1 fixup inhandleMakeBufferRsrc.handleFatRawBufferCast.